Accuracy And Precision; Interrupts; Low-Power Modes; Wait Mode - Motorola MC68HC908GP32 Technical Data Manual

5.4.5 Accuracy and Precision

5.5 Interrupts

5.6 Low-Power Modes

5.6.1 Wait Mode

5.6.2 Stop Mode

5.7 I/O Signals

MC68HC908GP32 MC68HC08GP32
•
MOTOROLA
Freescale Semiconductor, Inc.
The conversion process is monotonic and has no missing codes.
When the AIEN bit is set, the ADC module is capable of generating CPU
interrupts after each ADC conversion. A CPU interrupt is generated if the
COCO bit is at logic 0. The COCO bit is not used as a conversion
complete flag when interrupts are enabled.
The WAIT and STOP instruction can put the MCU in low power-
consumption standby modes.
The ADC continues normal operation during wait mode. Any enabled
CPU interrupt request from the ADC can bring the MCU out of wait
mode. If the ADC is not required to bring the MCU out of wait mode,
power down the ADC by setting ADCH4–ADCH0 bits in the ADC status
and control register before executing the WAIT instruction.
The ADC module is inactive after the execution of a STOP instruction.
Any pending conversion is aborted. ADC conversions resume when the
MCU exits stop mode after an external interrupt. Allow one conversion
cycle to stabilize the analog circuitry.
The ADC module has eight pins shared with port B,
PTB7/AD7–PTB0/AD0.
Rev. 6
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Analog-to-Digital Converter (ADC)
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Analog-to-Digital Converter (ADC)
Interrupts
Technical Data
91