V Control Timing - Motorola MC68HC908GP32 Technical Data Manual

Electrical Specifications

23.8 5.0-V Control Timing

Technical Data
372
Freescale Semiconductor, Inc.
(1)
Characteristic
(2)
Frequency of operation
Crystal option
(3)
External clock option
Internal operating frequency
Internal clock period (1/f
OP
RST input pulse width low
IRQ interrupt pulse width low
(edge-triggered)
IRQ interrupt pulse period
(7)
16-bit timer
Input capture pulse width
Input capture period
Notes:
1. V = 0 Vdc; timing shown with respect to 20% V
SS
2. See 23.17 Clock Generation Module Characteristics
3. No more than 10% duty cycle deviation from 50%
4. Some modules may require a minimum frequency greater than dc for proper operation.
See appropriate table for this information.
5. Minimum pulse width reset is guaranteed to be recognized. It is possible for a smaller pulse
width to cause a reset.
6. Minimum pulse width is for guaranteed interrupt. It is possible for a smaller pulse width to
be recognized.
7. Minimum pulse width is for guaranteed interrupt. It is possible for a smaller pulse width to
be recognized.
8. The minimum period, t
ILIL
execute the interrupt service routine plus t
Electrical Specifications
For More Information On This Product,
Go to: www.freescale.com
Symbol
f
OSC
f (f )
OP BUS
t
)
CYC
(5)
t
IRL
(6)
t
ILIH
t
ILIL
t t
TH, TL
t
TLTL
and 70% V
DD
or t , should not be less than the number of cycles it takes to
TLTL
.
CYC
MC68HC908GP32
Min Max Unit
32
100 kHz
(4)
32.8 MHz
dc
— 8.2 MHz
122 —
50 —
50 —
t
Note 8 —
—
Note 8
t
—
unless otherwise noted.
DD
for more information.
MC68HC08GP32 Rev. 6
• —
MOTOROLA
ns
ns
ns
CYC
ns
CYC