Pll Vco Range Select Register - Motorola MC68HC908GP32 Technical Data Manual

7.6.5 PLL VCO Range Select Register

NOTE:
NOTE:
MC68HC908GP32 MC68HC08GP32
•
MOTOROLA
Freescale Semiconductor, Inc.
PMRS may be called PVRS on other HC08 derivatives.
The PLL VCO range select register (PMRS) contains the programming
information required for the hardware configuration of the VCO.
Address: $003A
Bit 7 6
Read:
VRS7 VRS6
Write:
Reset: 0 1
Figure 7-8. PLL VCO Range Select Register (PMRS)
VRS7–VRS0 — VCO Range Select Bits
These read/write bits control the hardware center-of-range linear
multiplier L which, in conjunction with E (See
7.4.6 Programming the
controls the hardware center-of-range frequency, f
cannot be written when the PLLON bit in the PCTL is set. (See
Special Programming
range select register disables the PLL and clears the BCS bit in the
PLL control register (PCTL). (See
and 7.4.7 Special Programming
register to $40 for a default range multiply value of 64.
The VCO range select bits have built-in protection such that they cannot
be written when the PLL is on (PLLON = 1) and such that the VCO clock
cannot be selected as the source of the base clock (BCS = 1) if the VCO
range select bits are all clear.
The PLL VCO range select register must be programmed correctly.
Incorrect programming can result in failure of the PLL to achieve lock.
Rev. 6
—
Clock Generator Module (CGMC)
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Clock Generator Module (CGMC)
5 4 3
VRS5 VRS4 VRS3
0 0 0
PLL, and 7.6.1 PLL Control
Exceptions.) A value of $00 in the VCO
7.4.8 Base Clock Selector Circuit
Exceptions.). Reset initializes the
CGMC Registers
2 1 Bit 0
VRS2 VRS1 VRS0
0 0 0
7.4.3 PLL Circuits,
Register.),
. VRS7–VRS0
VRS
7.4.7
Technical Data
129