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Input/Output (I/O) Ports
16.3.3 Port A Input Pullup Enable Register
Technical Data
218
Freescale Semiconductor, Inc.
The port A input pullup enable register (PTAPUE) contains a software
configurable pullup device for each of the eight port A pins. Each bit is
individually configurable and requires that the data direction register,
DDRA, bit be configured as an input. Each pullup is automatically and
dynamically disabled when a port bit's DDRA is configured for output
mode.
Address:
$000D
Bit 7
6
Read:
PTAPUE7 PTAPUE6 PTAPUE5 PTAPUE4 PTAPUE3 PTAPUE2 PTAPUE1 PTAPUE0
Write:
Reset:
0
0
Figure 16-5. Port A Input Pullup Enable Register (PTAPUE)
PTAPUE7–PTAPUE0 — Port A Input Pullup Enable Bits
These writable bits are software programmable to enable pullup
devices on an input port bit.
1 = Corresponding port A pin configured to have internal pullup
0 = Corresponding port A pin has internal pullup disconnected
Input/Output (I/O) Ports
For More Information On This Product,
Go to: www.freescale.com
5
4
3
0
0
0
MC68HC908GP32
2
1
Bit 0
0
0
0
MC68HC08GP32
Rev. 6
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