Data Direction Register B - Motorola MC68HC908GP32 Technical Data Manual

Input/Output (I/O) Ports

16.4.2 Data Direction Register B

NOTE:
Technical Data
220
Freescale Semiconductor, Inc.
Data direction register B (DDRB) determines whether each port B pin is
an input or an output. Writing a logic 1 to a DDRB bit enables the output
buffer for the corresponding port B pin; a logic 0 disables the output
buffer.
Address: $0005
Bit 7 6
Read:
DDRB7 DDRB6
Write:
Reset: 0 0
Figure 16-7. Data Direction Register B (DDRB)
DDRB7–DDRB0 — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears
DDRB7–DDRB0], configuring all port B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 16-8 shows the port B I/O logic.
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
READ PTB ($0001)
Figure 16-8. Port B I/O Circuit
Input/Output (I/O) Ports
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5 4 3
DDRB5 DDRB4 DDRB3
0 0 0
DDRBx
PTBx
MC68HC908GP32
2 1 Bit 0
DDRB2 DDRB1 DDRB0
0 0 0
PTBx
MC68HC08GP32 Rev. 6
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