Timebase Module (Tbm); Wait Mode; Stop Mode; Exiting Wait Mode - Motorola MC68HC908GP32 Technical Data Manual

3.14 Timebase Module (TBM)

3.14.1 Wait Mode

3.14.2 Stop Mode

3.15 Exiting Wait Mode

MC68HC908GP32 MC68HC08GP32
•
MOTOROLA
Freescale Semiconductor, Inc.
The timebase module remains active after execution of the WAIT
instruction. In wait mode, the timebase register is not accessible by the
CPU.
If the timebase functions are not required during wait mode, reduce the
power consumption by stopping the timebase before enabling the WAIT
instruction.
The timebase module may remain active after execution of the STOP
instruction if the oscillator has been enabled to operate during stop mode
through the OSCSTOPEN bit in the CONFIG register. The timebase
module can be used in this mode to generate a periodic wakeup from
stop mode.
If the oscillator has not been enabled to operate in stop mode, the
timebase module will not be active during stop mode. In stop mode, the
timebase register is not accessible by the CPU.
If the timebase functions are not required during stop mode, reduce the
power consumption by stopping the timebase before enabling the STOP
instruction.
These events restart the CPU clock and load the program counter with
the reset vector or with an interrupt vector:
• External reset — A logic 0 on the RST pin resets the MCU and
loads the program counter with the contents of locations $FFFE
and $FFFF.
Rev. 6
—
Low-Power Modes
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Low-Power Modes
Timebase Module (TBM)
Technical Data
65