Flash Page Erase Operation - Motorola MC68HC908GP32 Technical Data Manual

11.5 FLASH Page Erase Operation

MC68HC908GP32 MC68HC08GP32
•
MOTOROLA
Freescale Semiconductor, Inc.
MASS — Mass Erase Control Bit
Setting this read/write bit configures the 32Kbyte FLASH array for
mass erase operation.
1 = MASS erase operation selected
0 = MASS erase operation unselected
ERASE — Erase Control Bit
This read/write bit configures the memory for erase operation.
ERASE is interlocked with the PGM bit such that both bits cannot be
equal to 1 or set to 1 at the same time.
1 = Erase operation selected
0 = Erase operation unselected
PGM — Program Control Bit
This read/write bit configures the memory for program operation.
PGM is interlocked with the ERASE bit such that both bits cannot be
equal to 1 or set to 1 at the same time.
1 = Program operation selected
0 = Program operation unselected
Use this step-by-step procedure to erase a page (128 bytes) of FLASH
memory to read as logic 1:
1. Set the ERASE bit, and clear the MASS bit in the FLASH control
register.
2. Read the FLASH block protect register.
3. Write any data to any FLASH address within the page address
range desired.
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Clear the ERASE bit.
8. Wait for a time, t
Rev. 6
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FLASH Memory
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(min. 10µs)
nvs
(min. 1ms)
Erase
(min. 5µs)
nvh
FLASH Memory
FLASH Page Erase Operation
Technical Data
167