Cgmc Block Diagram - Motorola MC68HC908GP32 Technical Data Manual

Clock Generator Module (CGMC)
OSC2
OSC1
SIMOSCEN (FROM SIM)
OSCSTOPENB
(FROM CONFIG)
CGMRDV
REFERENCE
DIVIDER
R
RDS3–RDS0
PHASE
DETECTOR
LOCK
DETECTOR
LOCK
MUL11–MUL0
CGMVDV
FREQUENCY
DIVIDER
Technical Data
108
Freescale Semiconductor, Inc.
OSCILLATOR (OSC)
PHASE-LOCKED LOOP (PLL)
CGMRCLK
V CGMXFC V
DDA SSA
LOOP
FILTER
PLL ANALOG
AUTOMATIC
MODE
CONTROL
AUTO ACQ
PRE1–PRE0
N
FREQUENCY
Figure 7-1. CGMC Block Diagram
Clock Generator Module (CGMC)
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CLOCK
BCS SELECT
CIRCUIT
VPR1–VPR0
VRS7–VRS0
E
L 2
VOLTAGE
CONTROLLED CGMVCLK
OSCILLATOR
INTERRUPT
CONTROL
PLLIE PLLF
P
2
DIVIDER
MC68HC908GP32
CGMXCLK
(TO: SIM, TIMTB15A, ADC)
A
CGMOUT
÷ 2
B S* (TO SIM)
SIMDIV2
*WHEN S = 1,
(FROM SIM)
CGMOUT = B
PLLIREQ
(TO SIM)
MC68HC08GP32
• —
MOTOROLA
Rev. 6