Motorola MC68HC908GP32 Technical Data Manual page 215

Addr. Register Name
Data Direction Register B
$0005
(DDRB)
Data Direction Register C
$0006
(DDRC)
Data Direction Register D
$0007
(DDRD)
Port E Data Register
$0008
(PTE)
Data Direction Register E
$000C
(DDRE)
Port A Input Pullup Enable
$000D Register
(PTAPUE)
Port C Input Pullup Enable
$000E Register
(PTCPUE)
Port D Input Pullup Enable
$000F Register
(PTDPUE)
Figure 16-1. I/O Port Register Summary (Continued)
MC68HC908GP32 MC68HC08GP32
•
MOTOROLA
Freescale Semiconductor, Inc.
Bit 7 6
Read:
DDRB7 DDRB6
Write:
Reset: 0 0
Read: 0
DDRC6
Write:
Reset: 0 0
Read:
DDRD7 DDRD6
Write:
Reset: 0 0
Read: 0 0
Write:
Reset:
Read: 0 0
Write:
Reset: 0 0
Read:
PTAPUE7 PTAPUE6 PTAPUE5 PTAPUE4 PTAPUE3 PTAPUE2 PTAPUE1 PTAPUE0
Write:
Reset: 0 0
Read: 0
PTCPUE6 PTCPUE5 PTCPUE4 PTCPUE3 PTCPUE2 PTCPUE1 PTCPUE0
Write:
Reset: 0 0
Read:
PTDPUE7 PTDPUE6 PTDPUE5 PTDPUE4 PTDPUE3 PTDPUE2 PTDPUE1 PTDPUE0
Write:
Reset: 0 0
= Unimplemented
Rev. 6
—
Input/Output (I/O) Ports
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5 4 3
DDRB5 DDRB4 DDRB3
0 0 0
DDRC5 DDRC4 DDRC3
0 0 0
DDRD5 DDRD4 DDRD3
0 0 0
0 0 0
Unaffected by reset
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
Input/Output (I/O) Ports
Introduction
2 1 Bit 0
DDRB2 DDRB1 DDRB0
0 0 0
DDRC2 DDRC1 DDRC0
0 0 0
DDRD2 DDRD1 DDRD0
0 0 0
0
PTE1 PTE0
0
DDRE1 DDRE0
0 0 0
0 0 0
0 0 0
0 0 0
Technical Data
213