Pin Name Conventions - Motorola MC68HC908GP32 Technical Data Manual

20.4 Pin Name Conventions

20.5 Functional Description
Addr. Register Name
SPI Control Register
$0010
(SPCR)
SPI Status and Control
$0011 Register
(SPSCR)
SPI Data Register
$0012
(SPDR)
MC68HC908GP32 MC68HC08GP32
•
MOTOROLA
Freescale Semiconductor, Inc.
The text that follows describes the SPI. The SPI I/O pin names are SS
(slave select), SPSCK (SPI serial clock), CGND (clock ground), MOSI
(master out slave in), and MISO (master in/slave out). The SPI shares
four I/O pins with four parallel I/O ports.
The full names of the SPI I/O pins are shown in
pin names appear in the text that follows.
Table 20-1. Pin Name Conventions
SPI Generic
MISO
Pin Names:
Full SPI
Pin Names: SPI PTD1/MISO PTD2/MOSI PTD0/SS PTD3/SPSCK
Figure 20-1 summarizes the SPI I/O registers and
the structure of the SPI module.
Bit 7 6
Read: DMAS
SPRIE
Write:
Reset: 0 0
Read: SPRF
ERRIE
Write:
Reset: 0 0
Read: R7 R6
Write: T7 T6
Reset:
= Unimplemented
Figure 20-1. SPI I/O Register Summary
Rev. 6
—
Serial Peripheral Interface Module (SPI)
For More Information On This Product,
Go to: www.freescale.com
Serial Peripheral Interface Module (SPI)
MOSI
5 4 3
SPMSTR CPOL CPHA
1 0 1
OVRF MODF SPTE
0 0 1
R5 R4 R3
T5 T4 T3
Unaffected by reset
Pin Name Conventions
Table 20-1. The generic
SS SPSCK CGND
Figure 20-2 shows
2 1
SPWOM SPE SPTIE
0 0
MODFEN SPR1
0 0
R2 R1
T2 T1
Technical Data
V
SS
Bit 0
0
SPR0
0
R0
T0
305