Table of Contents
Advertisement
Central Processor Unit (CPU)
Source
Operation
Form
BNE rel
Branch if Not Equal
BPL rel
Branch if Plus
BRA rel
Branch Always
BRCLR n,opr,rel Branch if Bit n in M Clear
BRN rel
Branch Never
BRSET n,opr,rel Branch if Bit n in M Set
BSET n,opr
Set Bit n in M
BSR rel
Branch to Subroutine
CBEQ opr,rel
CBEQA #opr,rel
CBEQX #opr,rel
Compare and Branch if Equal
CBEQ opr,X+,rel
CBEQ X+,rel
CBEQ opr,SP,rel
CLC
Clear Carry Bit
CLI
Clear Interrupt Mask
CLR opr
CLRA
CLRX
CLRH
Clear
CLR opr,X
CLR ,X
CLR opr,SP
Technical Data
158
Freescale Semiconductor, Inc.
Table 10-1. Instruction Set Summary (Continued)
PC ← (PC) + 2 + rel ? (Z) = 0
PC ← (PC) + 2 + rel ? (N) = 0
PC ← (PC) + 3 + rel ? (Mn) = 0
PC ← (PC) + 3 + rel ? (Mn) = 1
PC ← (PC) + 2; push (PCL)
SP ← (SP) – 1; push (PCH)
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 3 + rel ? (X) – (M) = $00
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 2 + rel ? (A) – (M) = $00
PC ← (PC) + 4 + rel ? (A) – (M) = $00
Central Processor Unit (CPU)
For More Information On This Product,
Go to: www.freescale.com
Description
V H I N Z C
– – – – – – REL
– – – – – – REL
PC ← (PC) + 2 + rel
– – – – – – REL
– – – – – ↕
PC ← (PC) + 2
– – – – – – REL
– – – – – ↕
Mn ← 1
– – – – – –
– – – – – – REL
SP ← (SP) – 1
PC ← (PC) + rel
– – – – – –
C ← 0
– – – – – 0 INH
I ← 0
– – 0 – – – INH
M ← $00
A ← $00
X ← $00
H ← $00
0 – – 0 1 –
M ← $00
M ← $00
M ← $00
MC68HC908GP32
Effect on
CCR
26
2A
20
DIR (b0)
01
DIR (b1)
03
DIR (b2)
05
DIR (b3)
07
DIR (b4)
09
DIR (b5)
0B
DIR (b6)
0D
DIR (b7)
0F
21
DIR (b0)
00
DIR (b1)
02
DIR (b2)
04
DIR (b3)
06
DIR (b4)
08
DIR (b5)
0A
DIR (b6)
0C
DIR (b7)
0E
DIR (b0)
10
DIR (b1)
12
DIR (b2)
14
DIR (b3)
16
DIR (b4)
18
DIR (b5)
1A
DIR (b6)
1C
DIR (b7)
1E
AD
DIR
31
IMM
41
IMM
51
IX1+
61
IX+
71
SP1
9E61
98
9A
DIR
3F
INH
4F
INH
5F
INH
8C
IX1
6F
IX
7F
SP1
9E6F
MC68HC08GP32
•
MOTOROLA
rr
3
rr
3
rr
3
dd rr
5
dd rr
5
dd rr
5
dd rr
5
dd rr
5
dd rr
5
dd rr
5
dd rr
5
rr
3
dd rr
5
dd rr
5
dd rr
5
dd rr
5
dd rr
5
dd rr
5
dd rr
5
dd rr
5
dd
4
dd
4
dd
4
dd
4
dd
4
dd
4
dd
4
dd
4
rr
4
dd rr
5
ii rr
4
ii rr
4
ff rr
5
rr
4
ff rr
6
1
2
dd
3
1
1
1
ff
3
2
ff
4
Rev. 6
—
Advertisement
Chapters
Table of Contents
