Flash Block Protect Register - Motorola MC68HC908GP32 Technical Data Manual

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FLASH Memory

11.8.1 FLASH Block Protect Register

Technical Data
172
Freescale Semiconductor, Inc.
The FLASH block protect register (FLBPR) is implemented as a byte
within the FLASH memory, and therefore can only be written during a
programming sequence of the FLASH memory. The value in this register
determines the starting location of the protected range within the FLASH
memory.
Address:
$FF7E
Bit 7
6
Read:
BPR7
BPR6
Write:
Reset:
U
U
U = Unaffected by reset. Initial value from factory is 1.
Write to this register is by a programming sequence to the FLASH memory.
Figure 11-3. FLASH Block Protect Register (FLBPR)
BPR[7:0] — FLASH Block Protect Bits
These eight bits represent bits [14:7] of a 16-bit memory address.
Bit-15 is logic 1 and bits [6:0] are logic 0s.
The resultant 16-bit address is used for specifying the start address
of the FLASH memory for block protection. The FLASH is protected
from this start address to the end of FLASH memory, at $FFFF. With
this mechanism, the protect start address can be XX00 and XX80
(128 bytes page boundaries) within the FLASH memory.
Start address of FLASH block protect
Figure 11-4. FLASH Block Protect Start Address
FLASH Memory
For More Information On This Product,
Go to: www.freescale.com
5
4
3
BPR5
BPR4
BPR3
U
U
U
16-bit memory address
1
FLBPR value
MC68HC908GP32
2
1
Bit 0
BPR2
BPR1
BPR0
U
U
U
0 0 0 0 0 0 0
MC68HC08GP32
Rev. 6
MOTOROLA

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