Cgnd (Clock Ground) - Motorola MC68HC908GP32 Technical Data Manual

20.13.5 CGND (Clock Ground)

MC68HC908GP32 MC68HC08GP32
•
MOTOROLA
Freescale Semiconductor, Inc.
When an SPI is configured as a master, the SS input can be used in
conjunction with the MODF flag to prevent multiple masters from driving
MOSI and SPSCK. (See 20.8.2 Mode Fault
SS pin to set the MODF flag, the MODFEN bit in the SPSCK register
must be set. If the MODFEN bit is low for an SPI master, the SS pin can
be used as a general-purpose I/O under the control of the data direction
register of the shared I/O port. With MODFEN high, it is an input-only pin
to the SPI regardless of the state of the data direction register of the
shared I/O port.
The CPU can always read the state of the SS pin by configuring the
appropriate pin as an input and reading the port data register.
Table 20-3.)
Table 20-3. SPI Configuration
SPE SPMSTR MODFEN
(1)
0
X
1 0
1 1
1 1
Note 1. X = Don't care
CGND is the ground return for the serial clock pin, SPSCK, and the
ground for the port output buffers. It is internally connected to V
shown in Table 20-1.
Rev. 6
—
Serial Peripheral Interface Module (SPI)
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Serial Peripheral Interface Module (SPI)
SPI Configuration
X Not enabled
X Slave
0 Master without MODF
1 Master with MODF
I/O Signals
Error.) For the state of the
(See
State of SS Logic
General-purpose I/O;
SS ignored by SPI
Input-only to SPI
General-purpose I/O;
SS ignored by SPI
Input-only to SPI
SS
Technical Data
as
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