Motorola MC68HC908GP32 Technical Data Manual page 117

NOTE:
MC68HC908GP32 MC68HC08GP32
•
MOTOROLA
Freescale Semiconductor, Inc.
6. Calculate and verify the adequacy of the VCO and bus
frequencies f
VCLK
7. Select the VCO's power-of-two range multiplier E, according to
this table:
0 < f
9,830,400 ≤ f
19,660,800 ≤ f
NOTE: Do not program E to a value of 3.
8. Select a VCO linear range multiplier, L, where f
9. Calculate and verify the adequacy of the VCO programmed
center-of-range frequency, f
the midpoint between the minimum and maximum frequencies
attainable by the PLL.
For proper operation,
10. Verify the choice of P, R, N, E, and L by comparing f
and f . For proper operation, f
VCLKDES
application's tolerance of f
possible to f
VCLK
Exceeding the recommended maximum bus frequency or VCO
frequency can crash the MCU.
Rev. 6
—
Clock Generator Module (CGMC)
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Go to: www.freescale.com
and f .
BUS
P
( × ⁄ ) ×
f = 2 N R
VCLK
( ) 4 ⁄
f = f
BUS VCLK
Frequency Range
< 9,830,400
VCLK
< 19,660,800
VCLK
< 39,321,600
VCLK

f
VCLK

L = round --------------------------
E

×
2 f
NOM
. The center-of-range frequency is
VRS
E
( × ) f
=
f L 2
VRS NOM
f
NOM
≤ --------------------------
–
f f
VRS VCLK
, and f
VCLKDES
.
Clock Generator Module (CGMC)
Functional Description
f
RCLK
E
0
1
2
= 38.4 kHz
NOM



E
×
2
2
VCLK
must be within the
VCLK
must be as close as
VRS
Technical Data
to f
VRS
115