V Spi Characteristics - Motorola MC68HC908GP32 Technical Data Manual

23.14 5.0-V SPI Characteristics

Diagram
(1)
Number
Operating frequency
Master
Slave
Cycle time
1 Master
Slave
2 Enable lead time
3 Enable lag time
Clock (SPSCK) high time
4 Master
Slave
Clock (SPSCK) low time
5 Master
Slave
Data setup time (inputs)
6 Master
Slave
Data hold time (inputs)
7 Master
Slave
Access time, slave
8 CPHA = 0
CPHA = 1
9 Disable time, slave
Data valid time, after enable edge
10 Master
(5)
Slave
Data hold time, outputs, after enable edge
11 Master
Slave
Notes:
1. Numbers refer to dimensions in
2. All timing is shown with respect to 20% V
3. Time to data active from high-impedance state
4. Hold time to high-impedance state
5. With 100 pF on all SPI pins
MC68HC908GP32 MC68HC08GP32
•
MOTOROLA
Freescale Semiconductor, Inc.
(2)
Characteristic
(3)
(4)
Figure 23-16 and Figure
and 70% V
DD
Rev. 6
—
Electrical Specifications
For More Information On This Product,
Go to: www.freescale.com
Symbol
f f
OP(M) OP
f
OP(S)
t
CYC(M)
t
CYC(S)
t
Lead(S)
t
Lag(S)
t t
SCKH(M) CYC
t 1/2 t
SCKH(S)
t t
SCKL(M) CYC
t 1/2 t
SCKL(S)
t
SU(M)
t
SU(S)
t
H(M)
t
H(S)
t
A(CP0)
t
A(CP1)
t
DIS(S)
t
V(M)
t
V(S)
t
HO(M)
t
HO(S)
23-17.
, unless noted; 100 pF load on all SPI pins.
DD
Electrical Specifications
5.0-V SPI Characteristics
Min Max
/128 f /2
OP
dc f
OP
2 128
1 —
1 —
1 —
–25 64 t
CYC
–25 —
CYC
–25 64 t
CYC
–25 —
CYC
30 —
30 —
30 —
30 —
0 40
0 40
— 40
— 50
— 50
0 —
0 —
Technical Data
Unit
MHz
MHz
t
CYC
t
CYC
t
CYC
t
CYC
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
383