Sources - Motorola MC68HC908GP32 Technical Data Manual

4.4.2 Sources

MC68HC908GP32 MC68HC08GP32
•
MOTOROLA
Freescale Semiconductor, Inc.
The sources in Table 4-1
Table 4-1. Interrupt Sources
Reset
SWI instruction
IRQ pin
CGM (PLL)
TIM1 channel 0
TIM1 channel 1
TIM1 overflow
TIM2 channel 0
TIM2 channel 1
TIM2 overflow
SPI receiver full
SPI overflow
SPI mode fault
SPI transmitter empty
SCI receiver overrun
SCI noise fag
SCI framing error
SCI parity error
SCI receiver full
SCI input idle
SCI transmitter empty
SCI transmission complete
Keyboard pin
ADC conversion complete
Timebase
Note:
1. The I bit in the condition code register is a global mask for all interrupt sources except the
SWI instruction.
2. 0 = highest priority
Rev. 6
—
Resets and Interrupts
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can generate CPU interrupt requests.
None None None
None None None
IRQF IMASK IF1
PLLF PLLIE IF2
CH0F CH0IE IF3
CH1F CH1IE IF4
TOF TOIE IF5
CH0F CH0IE IF6
CH1F CH1IE IF7
TOF TOIE IF8
SPRF SPRIE
OVRF ERRIE IF9
MODF ERRIE
SPTE SPTIE IF10
OR ORIE
NF NEIE
IF11
FE FEIE
PE PEIE
SCRF SCRIE
IF12
IDLE ILIE
SCTE SCTIE
IF13
TC TCIE
KEYF IMASKK IF14
COCO AIEN IF15
TBIF TBIE IF16
Resets and Interrupts
Interrupts
–
0
$FFFE $FFFF
–
0 $FFFC $FFFD
–
1 $FFFA $FFFB
2 $FFF8–$FFF9
3 $FFF6–$FFF7
4 $FFF4–$FFF5
5 $FFF2–$FFF3
6 $FFF0–$FFF1
7 $FFEE–$FFEF
8 $FFEC–$FFED
9 $FFEA–$FFEB
10 $FFE8–$FFE9
11 $FFE6–$FFE7
12 $FFE4–$FFE5
13 $FFE2–$FFE3
14 $FFE0–$FFE1
15 $FFDE–$FFDF
16 $FFDC–$FFDD
Technical Data
79