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Characteristic
Low-voltage inhibit, trip falling voltage
Low-voltage inhibit, trip rising voltage
Low-voltage inhibit reset/recover hysteresis
(V
+ V
= V
TRIPF
HYS
TRIPR
(8)
POR rearm voltage
(9)
POR reset voltage
POR rise time ramp rate
Notes:
= 5.0 Vdc ± 10%, V
1. V
DD
2. Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3. Run (operating) I
measured using external square wave clock source (f
DD
dc loads. Less than 100 pF on all outputs. C
affects run I
. Measured with all modules enabled.
DD
4. Wait I
measured using external square wave clock source (f
DD
Less than 100 pF on all outputs. C
wait I
. Measured with PLL and LVI enabled.
DD
5. Stop I
is measured with OSC1 = V
DD
6. Stop I
with TBM enabled is measured using an external square wave clock source (f
DD
from rail. No dc loads. Less than 100 pF on all outputs. All inputs configured as inputs.
7. Pullups and pulldowns are disabled. Port B leakage is specified in
8. Maximum is highest voltage that POR is guaranteed.
9. Maximum is highest voltage that POR is possible.
10. If minimum V
is not reached before the internal POR reset is released, RST must be driven low externally until minimum
DD
V
is reached.
DD
MC68HC908GP32
MC68HC08GP32
•
MOTOROLA
Freescale Semiconductor, Inc.
(1)
)
(10)
= 0 Vdc, T
= T
to T
, unless otherwise noted
SS
A
L
H
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects
L
.
SS
Rev. 6
—
Electrical Specifications
For More Information On This Product,
Go to: www.freescale.com
5.0-V DC Electrical Characteristics
Symbol
Min
V
3.90
TRIPF
V
4.20
TRIPR
V
—
HYS
V
0
POR
V
0
PORRST
R
0.035
POR
= 32.8 MHz). All inputs 0.2V from rail. No
OSC
= 32.8 MHz). All inputs 0.2 V from rail. No dc loads.
OSC
23.13 ADC
Characteristics.
Electrical Specifications
(2)
Max
Unit
Typ
4.25
4.50
4.35
4.60
100
—
—
100
700
800
—
—
V/ms
= 32.8 MHz). All inputs 0.2V
OSC
Technical Data
V
V
mV
mV
mV
369
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