Motorola MC68HC908GP32 Technical Data Manual page 68

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Low-Power Modes
Technical Data
66
Freescale Semiconductor, Inc.
External interrupt — A high-to-low transition on an external
interrupt pin (IRQ pin) loads the program counter with the contents
of locations: $FFFA and $FFFB; IRQ pin.
Break interrupt — A break interrupt loads the program counter
with the contents of $FFFC and $FFFD.
Computer operating properly module (COP) reset — A timeout of
the COP counter resets the MCU and loads the program counter
with the contents of $FFFE and $FFFF.
Low-voltage inhibit module (LVI) reset — A power supply voltage
below the V
voltage resets the MCU and loads the program
tripf
counter with the contents of locations $FFFE and $FFFF.
Clock generator module (CGM) interrupt — A CPU interrupt
request from the phase-locked loop (PLL) loads the program
counter with the contents of $FFF8 and $FFF9.
Keyboard module (KBI) interrupt — A CPU interrupt request from
the KBI module loads the program counter with the contents of
$FFE0 and $FFE1.
Timer 1 interface module (TIM1) interrupt — A CPU interrupt
request from the TIM1 loads the program counter with the
contents of:
– $FFF2 and $FFF3; TIM1 overflow
– $FFF4 and $FFF5; TIM1 channel 1
– $FFF6 and $FFF7; TIM1 channel 0
Timer 2 interface module (TIM2) interrupt — A CPU interrupt
request from the TIM2 loads the program counter with the
contents of:
– $FFEC and $FFED; TIM2 overflow
– $FFEE and $FFEF; TIM2 channel 1
– $FFF0 and $FFF1; TIM2 channel 0
Serial peripheral interface module (SPI) interrupt — A CPU
interrupt request from the SPI loads the program counter with the
contents of:
Low-Power Modes
For More Information On This Product,
Go to: www.freescale.com
MC68HC908GP32
MC68HC08GP32
Rev. 6
MOTOROLA

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