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Memory Map
2.4 Reserved Memory Locations
2.5 Input/Output (I/O) Section
Technical Data
44
Freescale Semiconductor, Inc.
Accessing a reserved location can have unpredictable effects on MCU
operation. In the
Figure 2-1
reserved locations are marked with the word Reserved or with the
letter R.
Most of the control, status, and data registers are in the zero page area
of $0000–$003F. Additional I/O registers have these addresses:
•
$FE00; SIM break status register, SBSR
•
$FE01; SIM reset status register, SRSR
•
$FE02; reserved, SUBAR
•
$FE03; SIM break flag control register, SBFCR
•
$FE04; interrupt status register 1, INT1
•
$FE05; interrupt status register 2, INT2
•
$FE06; interrupt status register 3, INT3
•
$FE07; reserved
•
$FE08; FLASH control register, FLCR
•
$FE09; break address register high, BRKH
•
$FE0A; break address register low, BRKL
•
$FE0B; break status and control register, BRKSCR
•
$FE0C; LVI status register, LVISR
•
$FF7E; FLASH block protect register, FLBPR
•
$FFFF; COP control register, COPCTL
Data registers are shown in
locations.
Memory Map
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and in register figures in this document,
Figure
2-2.
Table 2-1
MC68HC908GP32
MC68HC08GP32
•
is a list of vector
Rev. 6
—
MOTOROLA
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