Omron CPM1 - PROGRAMING MANUAL 02-2001 Programming Manual page 590

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Memory Areas
Note 1. IR and LR words that are not used for their allocated functions can be used as work words.
2. The contents of the HR area, AR area, Counter area, and read/write DM area are backed up by the CPU
Unit's battery. If the battery is removed or fails, the data in these areas will be lost and reset to default
values. (In CPM2C CPU Units without a battery, these areas are backed up by a capacitor. At 25_C, the
capacitor will back up memory for 10 days.)
3. When a TC number is used as a word operand, it accesses the timer or counter's PV; when used as a bit
operand, it accesses the Completion Flag.
4. Data in DM 6144 to DM 6655 cannot be overwritten from the program, but they can be changed from a
Programming Device. The program and data in DM 6144 to DM 6655 are backed up in flash memory.
SR Area
These bits mainly serve as flags related to CPM2A/CPM2C operation or contain present and set values for various
functions. The functions of the SR area are explained in the following table.
Note "Read-only" words and bits can be read as status in controller PC operation, but they cannot be written from
the ladder program. Bits and words that are "Not used" are also read-only.
Word(s)
Bit(s)
SR 228,
00 to 15
Pulse Output PV 0
SR 229
Contains the pulse output PV (–16,777,215 to 16,777,215). SR 22915 acts as
the sign bit; a negative number is indicated when SR 22915 is ON.
(The same PV data can be read immediately with PRV(62).)
Only Pulse Output PV 0 is used for ACC(––).
SR 230,
00 to 15
Pulse Output PV 1
SR 231
Contains the pulse output PV (–16,777,215 to 16,777,215). SR 23115 acts as
the sign bit; a negative number is indicated when SR 23115 is ON.
(The same PV data can be read immediately with PRV(62).)
SR 232
00 to 15
Macro Function Input Area
to
Contains the input operands for MCRO(99).
SR 235
(Can be used as work bits when MCRO(99) is not used.)
SR 236
00 to 15
Macro Function Output Area
to
Contains the output operands for MCRO(99).
SR 239
(Can be used as work bits when MCRO(99) is not used.)
SR 240
00 to 15
Interrupt Input 00003 Counter Mode SV
SV when interrupt input 00003 is used in counter mode (4 digits hexadeci-
mal).
(Can be used as work bits when interrupt input 00003 is not used in counter
mode.)
SR 241
00 to 15
Interrupt Input 00004 Counter Mode SV
SV when interrupt input 00004 is used in counter mode (4 digits hexadeci-
mal).
(Can be used as work bits when interrupt input 00004 is not used in counter
mode.)
SR 242
00 to 15
Interrupt Input 00005 Counter Mode SV
SV when interrupt input 00005 is used in counter mode (4 digits hexadeci-
mal).
(Can be used as work bits when interrupt input 00005 is not used in counter
mode.)
SR 243
00 to 15
Interrupt Input 00006 Counter Mode SV
SV when interrupt input 00006 is used in counter mode (4 digits hexadeci-
mal).
(Can be used as work bits when interrupt input 00006 is not used in counter
mode.)
(Input 00006 does not exist in CPM2C CPU Units with 10 I/O points.)
Function
Appendix C
Read/
Page
write
Read-
106
only
Read/
157
write
73
575

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