Omron SYSMAC CPM2B-S001M-DRT PLC Chassis Manuals

Manuals and User Guides for Omron SYSMAC CPM2B-S001M-DRT PLC Chassis. We have 1 Omron SYSMAC CPM2B-S001M-DRT PLC Chassis manual available for free PDF download: Operation Manual

Omron SYSMAC CPM2B-S001M-DRT Operation Manual

Omron SYSMAC CPM2B-S001M-DRT Operation Manual (173 pages)

Brand: Omron | Category: Controller | Size: 3 MB

Table of Contents

Table of Contents

6
- Intended Audience
  10
- General Precautions
  10
- Safety Precautions
  10
- Operating Environment Precautions
  11
- Application Precautions
  12
Section 1 Introduction

14
- Introduction
  14
- CPM2B-S Features
  15
- CPM2B-S Features and Functions
  15
- Overview of CPM2B-S Functions
  20
- CPU Board
  21
- Expansion I/O Boards
  21
- System Configurations
  21
- Connecting a Programming Console
  22
- One-To-One Computer Connections
  23
- Support Software
  23
- One-To-N Computer Connections
  24
- OMRON PT Connections
  25
- One-To-One PC Link Connections
  26
- CPU Board Structure
  27
- Structure and Operation
  27
- Operating Mode at Startup
  28
- Operating Modes
  28
- PC Operation at Startup
  29
- Cyclic Operation and Interrupts
  30
Section 2 Board Specifications and Components

34
- Board Specifications and Components
  34
- General Specifications
  35
- Specifications
  35
- Characteristics
  36
- I/O Specifications
  38
- Board Components and Their Functions
  41
- CPU Board Components
  41
Section 3 Installation and Wiring

45
- Installation and Wiring
  45
- Design Precautions
  46
- Interlock and Limit Circuits
  46
- Power Supply Voltage
  46
- Power Supply Wiring
  46
- Installation Site Conditions
  47
- Panel/Cabinet Installation
  47
- Selecting an Installation Site
  47
- Assembling the CPM2B-S Boards
  48
- Installing the CPM2B-S
  50
- Wiring and Connections
  51
- Power Supply Wiring
  52
- I/O Wiring Procedures
  53
- Wiring Compobus/S Transmission Lines
  63
- Wiring Devicenet Communications Cables
  65
- Connecting a Programming Device to the Peripheral Port
  66
- Connecting to the RS-232C Port
  67
Section 4 Memory Areas

69
- Memory Areas
  69
- Introduction
  70
- Functions
  71
- I/O Memory Area Attributes
  74
- I/O Allocation for CPM2B-S Pcs
  75
- I/O Allocation to Compobus/S Slaves
  77
- SR Area
  78
- AR Area
  81
- Overview
  85
- PC Setup
  85
- PC Setup Settings
  86
- Basic PC Operation and I/O Processes
  91
- Startup Mode
  91
- Hold Bit Status
  92
- Program Memory Write-Protection
  92
- Cycle Monitor Time
  93
- Peripheral Port Servicing Time
  93
- RS-232C Port Servicing Time
  93
- Input Time Constants
  94
- Minimum Cycle Time
  94
- Error Detection and Error Log Settings
  95
- Error Log
  96
- Instruction Set
  97
- CPM2B-S Function Codes
  98
- Alphabetic List by Mnemonic
  99
- Expansion Instructions
  102
Section 6 Exchanging Data with Compobus/S Slaves

103
- Exchanging Data with Compobus/S Slaves
  103
- Initial Settings
  104
- Setting the Compobus/S Communications Mode
  104
- Setting the Maximum Number of Nodes
  104
- Remote I/O Communications
  105
- Slaves
  105
- I/O Allocation
  106
- Communications Status
  107
- Communications Status
  108
Section 7 Exchanging Data with a Devicenet Master

109
- Exchanging Data with a Devicenet Master
  109
- Attaching Status Information
  110
- Initial Settings
  110
- Remote I/O Communications
  110
- Setting the Communications Speed
  110
- Setting the Node Number
  110
- Devicenet Explicit Message Functions
  113
- Explicit Message Communications
  113
- Command and Response Formats
  114
- Examples of Devicenet Explicit Messages
  120
- LED Indicators
  125
- Status Information
  125
- AR Area Flags Indicating Devicenet Status
  126
- CPM2B-S Status Output to Devicenet
  126
Section 8 Cycle Time and I\/O Response Time

128
- Cycle Time and I/O Response Time
  128
- Cycle Time
  129
- Cyclic Operation and Interrupts
  129
- Instruction Execution Times
  132
- CPM2B-S I/O Response Time
  142
- I/O Response Time
  142
- I/O Response Time between Compobus/S Slaves
  143
- Interrupt Processing Time
  144
- One-To-One PC Link I/O Response Time
  145
Section 9 Test Runs and Error Processing

148
- Test Runs and Error Processing
  148
- CPM2B-S Test Run Procedure
  149
- Flash Memory Precautions
  149
- Initial System Checks
  149
- Initial System Checks and Test Run Procedure
  149
- Identifying Errors
  150
- Self-Diagnostic Functions
  150
- User-Defined Errors
  151
- Non-Fatal Errors
  152
- Fatal Errors
  153
- Troubleshooting Flowcharts
  154
- Battery Replacement
  162
- Maintenance Inspections
  162
- Standard Models
  164
- Dimensions
  168
- Index
  169
- Revision History
  172

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