Ladder Diagram Instructions - Omron CPM1 - PROGRAMING MANUAL 02-2001 Programming Manual

Ladder Diagram Instructions

7-7 Ladder Diagram Instructions
7-7-1 LOAD, LOAD NOT, AND, AND NOT, OR, and OR NOT
LOAD – LD
LOAD NOT – LD NOT
AND – AND
AND NOT – AND NOT
OR – OR
OR NOT – OR NOT
Limitations
Description
Flags
376
Ladder diagram instructions include ladder instructions and logic block instruc-
tions and correspond to the conditions on the ladder diagram. Logic block
instructions are used to relate more complex parts.
Ladder Symbols
B
B
B
B
B
B
There is no limit to the number of any of these instructions, or restrictions in the
order in which they must be used, as long as the memory capacity of the PC is
not exceeded.
These six basic instructions correspond to the conditions on a ladder diagram.
As described in Section 6 Ladder-diagram Programming, the status of the bits
assigned to each instruction determines the execution conditions for all other
instructions. Each of these instructions and each bit address can be used as
many times as required. Each can be used in as many of these instructions as
required.
The status of the bit operand (B) assigned to LD or LD NOT determines the first
execution condition. AND takes the logical AND between the execution condi-
tion and the status of its bit operand; AND NOT, the logical AND between the
execution condition and the inverse of the status of its bit operand. OR takes the
logical OR between the execution condition and the status of its bit operand; OR
NOT, the logical OR between the execution condition and the inverse of the sta-
tus of its bit operand.
There are no flags affected by these instructions.
Section
Operand Data Areas
B: Bit
IR, SR, AR, HR, TC, LR, TR
B: Bit
IR, SR, AR, HR, TC, LR
B: Bit
IR, SR, AR, HR, TC, LR
B: Bit
IR, SR, AR, HR, TC, LR
B: Bit
IR, SR, AR, HR, TC, LR
B: Bit
IR, SR, AR, HR, TC, LR
7-7