Omron CPM1 - PROGRAMING MANUAL 02-2001 Programming Manual page 241

DeviceNet I/O Link Unit
Connecting the
DeviceNet I/O Link Unit
DeviceNet master
I/O memory
32 bits
32 bits
Connect the DeviceNet I/O Link Unit to the CPU Unit. Up to three Units can be
connected to the CPM1A/CPM2A. When Expansion I/O Units or other Expan-
sion Units are also connected, they can be connected in any order from the CPU
Unit.
CPM1A/CPM2A CPU Unit
I/O Allocation
I/O words are allocated to the DeviceNet I/O Link Unit in the same way as Expan-
sion I/O Units or other Expansion Units, the next available input and output
words are allocated. When "m" is the last allocated input word and "n" is the last
allocated output word, the DeviceNet I/O Link Unit is allocated "m+1" as its input
word and "n+1" as its output word.
In the following example, a DeviceNet I/O Link Unit is connected to a CPU Unit
with 30 I/O points.
Input words
Output words
All of the words allocated to the DeviceNet I/O Link Unit are used to read and
write data between the CPU Unit of the DeviceNet I/O Link Unit and the CPU Unit
of the DeviceNet master, as shown in the following illustration.
15 14 13 12 11 10 9 8 7 6
IR 000
IR 001
Do not use.
(m)
IR 002
(m+1)
IR 003
(m+2)
15 14 13 12 11 10 9 8 7 6
IR 010
IR 011
(n)
IR 012
(n+1)
IR 013
(n+2)
The 32 bits each of I/O data are not always transmitted simultaneously. In other
words, 32 bits of data transmitted from the Master CPU Unit at the same time will
not always reach the Slave CPU Unit simultaneously, and 32 bits of data trans-
mitted from the Slave CPU Unit at the same time will not always reach the Master
CPU Unit simultaneously.
CPM1A-DRT21
DeviceNet
I/O Link Unit
DeviceNet I/O Link Unit
Word m+1 bits 00 to 15
Word m+2 bits 00 to 15
32 inputs
32 outputs
Word n+1 bits 00 to 15
Word n+2 bits 00 to 15
IR 000
IR 001
CPU Unit with
30 I/O points
IR 010
IR 011
Input bits
5 4 3 2 1 0
IR 00000 to IR 00011: 12 bits
IR 00100 to IR 00105: 6 bits
IR 00200 to IR 00215: 16 bits
IR 00300 to IR 00315: 16 bits
Output bits
5 4 3 2 1 0
IR 01000 to IR 01007: 8 bits
IR 01100 to IR 01103: 4 bits
IR 01200 to IR 01215: 16 bits
IR 01300 to IR 01315: 16 bits
Section 3-4
IR 002
IR 003
DeviceNet I/O
LInk Unit
IR 012
IR 013
CPU Unit
DeviceNet I/O Link
Unit
CPU Unit
DeviceNet I/O Link
Unit
221