Omron CPM1 - PROGRAMING MANUAL 02-2001 Programming Manual page 109

CPM1/CPM1A Interrupt Functions
Processing
ON
Phase A
OFF
ON
Phase B
OFF
Count
88
An overflow will occur if the count exceeds the upper limit in the count range and
an underflow will occur if the count goes below the lower limit in the count range.
Error
Overflow Occurs when the count is
incremented from 65,535.
Underflow ---
Two types of signals can be input from a pulse encoder. The count mode used for
the high-speed counter will depend on the signal type. The count mode and re-
set mode are set in DM 6642; these settings become effective when the power is
turned on or PC operation is started.
Up/Down Mode:
Phase-A difference 4 two-phase signal (phase-A and phase-B) and a
phase-Z signal are used for inputs. The count is incremented or decrem-
ented according to differences in the 2-phase signals.
Incrementing Mode:
One single-phase pulse signal and a count reset signal are used for inputs.
The count is incremented according to the single-phase signal.
Up/Down Mode
1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 –1 –2
Incremented Decremented
Note One of the reset methods described below should always be used to reset the
counter when restarting it. The counter will be automatically reset when program
execution is started or stopped.
The following signal transitions are handled as forward (incrementing) pulses:
Phase-A leading edge to phase-B leading edge to phase-A trailing edge to
phase-B trailing edge. The following signal transitions are handled as reverse
(decrementing) pulses: Phase-B leading edge to phase-A leading edge to
phase-B trailing edge to phase-A trailing edge.
The Up/Down Mode always uses a 4 phase-difference input. The number of
counts for each encoder revolution would be 4 times the resolution of the count-
er. Select the encoder based on the countable ranges.
Reset Methods
Either of the two methods described below may be selected for resetting the PV
of the count (i.e., setting it to 0).
Phase-Z signal + software reset:
The PV is reset when the phase-Z signal (reset input) is turned ON while the
High-speed Counter Reset Bit (SR 25200) is ON.
Software reset:
The PV is reset when the High-speed Counter Reset Bit (SR 25200) is
turned ON.
Incrementing
Occurs when the count is
incremented from 32,767.
Occurs when the count is
decremented from –32,767.
ON
Pulse
input
OFF
Count
Section
Up/Down
0FFF FFFF
FFFF FFFF
Incrementing Mode
1 2 3 4
Incremented only
2-3
Present
value