Bit Synchronization - Safran CORTEX Series User Manual

High data rate receiver
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Please note that for link budget with actual satellite that implementation loss doesn't take into account
imperfections of:
on board modulator RF and antenna Multipath non-linearity ...
-
non Gaussian transmission imperfection weather...
-
-
ground imperfection: pointing accuracy RF & feed..
And for transmission above 300Mbps all those imperfections become critical.
Cortex DEAF and/or XDEAF will correct all those imperfections with residual loss from 0.1 to 1dB.
1.6.1.4

Bit Synchronization

Acquisition range
PCM code
Differential decoder
Eb/No measurement
Symbol clock display
Output ports
Output (electrical)
Output clock polarity
Output data polarity
© Safran Data Systems – IMP000074 e14r1
HIGH DATA RATE RECEIVER
HDR-4G+ USER'S MANUAL
 0.1 % of the symbol rate
NRZ-L/M/S, BP-L/M/S
DNRZ for QPSK and OQPSK
Resolution: 0.1 dB
Accuracy: 1 dB
Yes
I Channel : Data & Clock
Q Channel : Data & Clock
Merged I+Q
: Data & Clock
ECL Differential or LVDS
Normal or inverted
Normal or inverted (+ swap I/Q)
This document is the property of
It cannot be duplicated or distributed without expressed written consent.
Ref.
DTU 100782
Is.Rev
3.5
Date:
June 1, 2021
Safran Data Systems
.
Page 46

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