Test Modulator Board; Demodulator Board; I/O Connectors - Safran CORTEX Series User Manual

1.4.3.2

Test Modulator Board

Test Modulator is an optional board for test purposes:

PCM generation: internal data (pseudo-random or pattern from files) or external data (+
associated clock);

PCM encoding;

Frame encoding (CADU size) at two levels: External framing, internal framing. This enables
transport layering;

Randomization;

Error code encoding (exclusive functions):
RS DVB transport layer,
CCSDS RS,
LDPC;

Convolutional encoding;

Carrier generation & modulation (programmable Bit rate and IF frequency):
BPSK, QPSK, OQPSK, UQPSK, (TCM) 8PSK, 16QAM, 16APSK, 32 APSK, 64 APSK;

Baseband pulse shape filtering (RRC, GMSK);

Modulated signal output with programmable power level, up to two IF inputs;

Noise generation with programmable power level and perfect C/N generation;

Doppler simulation;

Cross polarization interference simulation;

DVB-S2(-X) and SCCC(-X) modulation sequences simulation.
1.4.3.3

Demodulator Board

Main features of the Demodulator board are:
 Amplification, filtering and analog-to-digital conversion of the IF signal;
 Digital vector demodulation;
 Bit synchronization;
 Decoding: Viterbi/TCM/LDPC/....;
 PCM decoding;
 Frame synchronization;
 Time tagging;
 De-randomization, RS or LDPC decoding;
 Data and Clock output;
 BER measurement;
 Vector analysis.
The Demodulator board is monitored and controlled by the Server CPU board via the PCI-express bus.
1.4.3.4

I/O Connectors

SMA-type I/O connectors are located at the rear panel of the chassis (Demodulator I/Os and Test
Modulator I/Os). The HDR can be delivered with LVDS outputs (option) or other.
See Section 2 for a detailed description of the I/O ports.
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HIGH DATA RATE RECEIVER
HDR-4G+ USER'S MANUAL
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Date: June 1, 2021
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