Test Modulator I/Os; Table 9: Modulator I/Os Definition - Safran CORTEX Series User Manual

High data rate receiver
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2.2.2.3

Test Modulator I/Os

All I/O connectors are SMA:
I/O S
L
ECTION
ABEL
IF OUT 1
IF OUT 2
IN1
IN2
IN3
IN4
IN5
10 MHz IN
MOD EXT IN 1
MOD EXT IN 2
MOD EXT OUT 1
MOD EXT OUT 2
© Safran Data Systems – IMP000074 e14r1
HIGH DATA RATE RECEIVER
HDR-4G+ USER'S MANUAL
ID
S
D
IGNAL
EFINITION
J50
IF output
J51
J52
J53
J54
Data input (note 1)
J55
J56
J57
Input Reference Clock
J58
IF Input of test mod
Up-converter 1
Optional
J59
IF Input of test mod
Up-converter 2
Optional
J36
IF Output of test mod
Up-converter 1
Optional
J37
IF Output of test mod
Up-converter 2
Optional

Table 9: Modulator I/Os Definition

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It cannot be duplicated or distributed without expressed written consent.
Ref.
DTU 100782
Is.Rev
3.5
Date:
June 1, 2021
E
LECTRICAL
-5 to –50 dBm
Single ended ECL
> -0.81 V for high level
< -1.95 V for low level
ECL termination -2V, 56  included
(Not used in this version)
10 MHz, sine or square, 50 
0.5 to 10 Vpp (if DC = 0)
DC max =  4 V
0 dBm
0 dBm
-10 to –40 dBm
-10 to –40 dBm
Safran Data Systems
.
Page 72

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