Table 2: Demodulator I/Os Definition - Safran CORTEX Series User Manual

DEMODULATOR
CHANNEL B
HW dependant
DEMODULATOR CLK IN +
INPUT CLK IN -
LVDS I/Os LVDS DEMOD
HW dependant
LVDS DEMOD
LVDS DEMOD
LVDS DATA
LVDS DATA IN
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HIGH DATA RATE RECEIVER
HDR-4G+ USER'S MANUAL
CLK + J20
CLK - J21
OUT1 + J22
OUT1 - J23
OUT2 + J24
OUT2 - J25
OUT3 + J26
OUT3 - J27
J60
J61
IN1 + J62
IN1 - J63 for BER measurement or
IN2 + J64
IN2 - J65 for BER measurement or
IN3 + J66
IN3 - J67 for BER measurement or
J70
OUT A
J71
OUT B
J72
IN
J73
OUT
J74

Table 2: Demodulator I/Os Definition

Ref.
Is.Rev
Date:
Refer to paragraph
(2.2.2.2.1 )
Refer to paragraph
(2.2.2.2.1 )
Refer to paragraph
(2.2.2.2.1 )
Refer to paragraph
(2.2.2.2.1 )
Clock input
Data input
data post-processing
50  termination required (note 2)
Data input
data post-processing
Data input
data post-processing
Data and clock outputs
for demodulator A
Data and clock outputs
for demodulator B
Data and clock inputs
For customized
interconnection panel
For customized
interconnection panel
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DTU 100782
3.5
June 1, 2021
ECL differential
+ -
V > -1 Volt, V < -1.7 Volt
Adapted Termination required
(note 1)
ECL differential
+ -
V > -1 Volt, V < -1.7 Volt
LVDS standard characteristics
(note 3)
.
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