Safran CORTEX Series User Manual page 291

High data rate receiver
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NRZM DPU
AUTO AMBIG.
LSB FIRST
SYNC. WORD
SW MASK
SYNC. WORD SIZE
FRAME/BLOCK SIZE
SYNCHRONIZATION
STRATEGY
© Safran Data Systems – IMP000074 e14r1
HIGH DATA RATE RECEIVER
HDR-4G+ USER'S MANUAL
Click on the check box to enable or disable the function:
The received data in the DPU are decoded from NRZ-M to
Enable
NRZ-L before being sent to the frame synchronizer
No PCM decoding is performed
Disable
Click on the check box to enable or disable the ambiguity resolution operation
by the frame synchronizer:
Enable
Automatic Ambiguity Resolution ON.
Disable
Automatic Ambiguity Resolution OFF.
Enable
The frame synchronizer works with LSB first byte format
Disable
The frame synchronizer works with MSB first byte format
Synchronization Word. Enter any 64-bit hexadecimal value (left field = 32 MS
bits, right field = 32 LS bits). MSB-aligned value. Example: If the
Synchronization Word is 1ACFFC1D
Synchronization Word mask. Enter any 128-bit hexadecimal value. MSB-
aligned value. « 1 » bits in the mask indicate which bits in the Synchronization
Word must be ignored by the frame synchronizer. Enter 0 for no mask.
Example: for a 32-bit Synchronization word, enter 00000000XXXXXXXX
masked bits).
Synchronization Word size, in bits. Must be an integer number of bytes. Enter
8, 16, 24, 32, 40, 48, 56, 64, ... or 128.
Example: if the Synchronization Word is 1ACFFC1D
For an non integer number of bytes specification, use the upper integer number
of bytes value and use the mask to meet specification.
Telemetry frame length, in bytes. Enter any integer from 16 to 1048580.
Includes the Synchronization Word.
Frame synchronizer strategy:
Number of errors tolerated in the Synchronization Word. Enter any
SYN
integer from 0 to 15.
Check-to-Lock threshold. Number of consecutive occurrences of
CTL
correct Synchronization Words before going from the CHECK phase to
the LOCK phase. Enter any integer from 0 to15.
Lock-to-Search threshold. Number of consecutive occurrences of
LTS
incorrect Synchronization Words before going from the LOCK phase
to the SEARCH phase. Enter any integer from 0 to 15.
Slip
Number of bit slip tolerated for the search of the synchronization word
in LOCK phase. Enter 0, 1 or 2.
It cannot be duplicated or distributed without expressed written consent.
Ref.
DTU 100782
Is.Rev
Date:
, enter 1ACFFC1D00000000
H
, enter 32.
H
Safran Data Systems
This document is the property of
3.5
June 1, 2021
).
H
(no
H
.
Page 291

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