Status & Warnings; Error Insertion; Figure 181: Status: Clock Status, Locked And Unlocked; Figure 182: Clock And Raw Bitrate Estimates - Safran CORTEX Series User Manual

High data rate receiver
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4.5.8.4.3
Status & Warnings
The upper left part of the window indicates whether an incoming clock is detected or not.
The clock frequency and the raw bitrate are also indicated in the middle of the window:
The raw bitrate is estimated by multiplying the instant frequency estimate by the number of bits in
parallel on the interface. This depends on the selected input scheme (parallel 2, 3 4 or Hard Symbol +
modulation).
For each possible data stream (1 to 4), BER status and an errors status is indicated. Both indicators
can be reset by clicking the '0' button in the main Cortex GUI.
The upper banner indicates the Warning status: OK (green display) or ERROR (red display).
When pointing at the banner, more information about the Warning is displayed.
4.5.8.5

Error insertion

A click on the button
convolutional encoding (if enabled).
When a "DGU" Window is active, the bit is inverted in this DGU
When a "MDU" Window is active, the bit is inverted in one of the DGUs connected to this MDU
(randomly chosen). This mode is not yet available.
When no window is active, the bit is inverted in one of the mounted DGUs (randomly chosen)
© Safran Data Systems – IMP000074 e14r1
HIGH DATA RATE RECEIVER
HDR-4G+ USER'S MANUAL

Figure 181: Status: clock status, Locked and Unlocked

Figure 182: clock and raw bitrate estimates

Figure 183: BER and Errors status

Figure 184: Pointing at an error

inverts one bit in the simulated data-pattern. Bit inversion takes place before
It cannot be duplicated or distributed without expressed written consent.
Ref.
DTU 100782
Is.Rev
Date:
Safran Data Systems
This document is the property of
3.5
June 1, 2021
.
Page 344

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