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M30245 Group
Example of wiring
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Example of operation (when direct format)
T r a n s f e r c l o c k
Transmit
enable bit (TE)
Transmit buffer
empty flag (Tl)
T
D
( N o t e 2 )
X
i
R
D
( N o t e 2 )
X
i
S i g n a l l i n e l e v e l
( N o t e 2 )
T r a n s m i t b u f f e r
e m p t y f l a g
( T E X P T )
T r a n s m i t
i n t e r r u p t r e q u e s t
b i t ( I R )
Figure 2.4.13. Operation timing of transmission in UART mode (used for SIM interface)
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Microcomputer
TxD
RxD
Note1: TxDi pin is N-channel open drain and needs a pull-up resistance.
Note2: i=0 to 3
( 1 ) T r a n s m i s s i o n e n a b l e d
( 2 ) S t a r t t r a n s m i s s i o n
T c
" 1 "
" 0 "
D a t a i s s e t i n U A R T i t r a n s m i t b u f f e r r e g i s t e r
"1"
" 0 "
Start
bit
S T
D
D
D
D
0
1
2
3
S T
D
D
D
D
0
1
2
3
" 1 "
" 0 "
" 1 "
" 0 "
S h o w n i n ( ) a r e b i t s y m b o l s .
The above timing applies to the following settings :
• Parity is enabled.
• One stop bit.
• Transmit interrupt cause select bit = "1".
N o t e 1 : T h e t r a n s m i t i s s t a r t e d w i t h o v e r f l o w t i m i n g o f B R G a f t e r h a v i n g w r i t t e n i n a v a l u e a t t h e t r a n s m i t b u f f e r i n t h e a b o v e t i m i n g .
N o t e 2 : T x D
a n d R x D
a r e c o n n e c t e d i n t h e m a n n e r o f w i r e d O R a s s h o w n i n t h e c o n n e c t i o n d i a g r a m . T h e r e f o r e , t h e s i g n a l l e v e l s o f
i
i
T x D i a n d R x D i s h o u l d b e t h e s a m e , b u t t h e o u t p u t s i g n a l s a r e s h o w n s e p a r a t e l y f o r e a s e o f u n d e r s t a n d i n g . A l s o , t h e s i g n a l
l e v e l r e s u l t i n g f r o m c o n n e c t i n g T x D
N o t e 3 : i = 0 t o 3
page 74 of 354
(Note1)
SIM card
i
i
( 3 ) C o n f i r m s t o p b i t
( 4 ) S t a r t t r a n s m i s s i o n
(Note 1)
T r a n s f e r r e d f r o m U A R T i t r a n s m i t b u f f e r r e g i s t e r t o U A R T i t r a n s m i t r e g i s t e r
Parity
Stop
bit
bit
D
D
D
D
P
S P
ST
D
7
4
5
6
S i n c e a p a r i t y e r r o r o c c u r r e d , t h e
" L " l e v e l r e t u r n s f r o m S I M c a r d
D
D
P
ST
D
D
D
SP
4
5
6
7
D e t e c t s t h e l e v e l
u s i n g a n i n t e r r u p t
r o u t i n e
C l e a r e d t o " 0 " w h e n i n t e r r u p t r e q u e s t i s a c c e p t e d , o r c l e a r e d b y s o f t w a r e
Tc = 16 (n + 1) / fi or 16 (n + 1) / f
fi : frequency of BRGi count source (f
f
frequency of BRGi count source (external clock)
EXT :
n : value set to BRGi
a n d R x D
i s s h o w n a s a s i g n a l l i n e l e v e l .
i
i
(5) Dispose
parity error
D
D
D
D
D
D
D
P
7
0
1
2
3
4
5
6
S P
SP
D
D
D
D
D
P
D
D
0
1
2
3
4
5
6
7
EXT
, f
, f
)
1
8
32
2. SIM interface
Detects the level
using an interrupt
routine
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