Table of Contents
Advertisement
M30245 Group
Example of wiring
www.DataSheet4U.com
Example of operation
Transfer clock
Transmit
enable bit (TE)
Transmit
buffer empty
flag (Tl)
CTSi
CLKi
TxDi
Transmit register
empty flag
(TXEPT)
Transmit
interrupt request
bit (IR)
Shown in ( ) are bit symbols.
The above timing applies to the following settings:
Figure 2.3.5. Operation timing of transmission in clock-synchronous serial I/O mode
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Microcomputer
(1) Transmission enabled
(2) Confirming CTS
(3) Start transmission Tc
"1"
"0"
Data is set to UARTi transmit buffer register
"1"
"0"
Transferred from UARTi transmit buffer register to UARTi transmit register
"H"
"L"
T
CLK
D
D
D
D
D
0
1
2
3
"1"
"0"
"1"
"0"
• Internal clock is selected.
• CTS function is selected.
• CLK polarity select bit = "0".
• Transmit interrupt cause select bit = "0".
page 46 of 354
(Note)
CLKi
T
Di
X
CTSi
Note : Since T
D
pin is N-channel open drain,
X
2
this pin needs pull-up resistance.
(4) Transmission is complete
(5) Transmit next data
Stopped pulsing because CTSi = "H"
D
D
D
D
D
D
D
D
7
4
5
6
0
1
2
3
Cleared to "0" when interrupt request is accepted, or cleared by software
Tc = T
= 2(n + 1) / fi
CLK
fi: frequency of BRGi count source (f
n: value set to BRGi
2. Clock-Synchronous Serial I/O
Receiver side IC
CLK
R
D
X
Port
Stopped pulsing because
transfer enable bit = "0"
D
D
D
D
D
D
D
7
4
5
6
0
1
2
3
, f
, f
1
8
32
D
D
D
D
7
4
5
6
)
Advertisement
Table of Contents
