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Setting DMA0 control register
b7
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Setting source pointer(endpoint 1 OUT FIFO data register) and destination pointer
(SS interface 1 transmit buffer register)
b23
b23
Checking that OUT_BUF_STS1 flag is "1" and setting the number of the transfer bytes (Note)
(b15)
b7
Note: Set 1/2
Enable serial sound interface 1
b7
Enable DMA0
b7
Figure 3.7.3. Setting routine (2) of DMA transfer from USB OUT FIFO to serial sound interface
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Continued from the previous page
b0
DMA0 control register
0
0
0
0
0
0
DM0CON [Address 002C
Transfer unit select bit
0 : 16 bits
Repeat transfer mode select bit
0 : Single transfer
DMA request bit
0 : DMA not requested
DMA enable bit
0 : Disabled
Source address direction select bit
0 : Fixed
Destination address direction select bit
0 : Fixed
b19
b16
b15
b8 b7
0 0 0 0
02
16
b16
b15
b8 b7
b19
0 0 0 0
03
16
(b8)
b0 b7
b0
DMA0 transfer counter
00
8F
16
16
TCR0 [Address 0029
(the value of Endpoint 1 OUT write count register) –1.
b0
Serial Sound Interface 1 mode register 0
1
SSI1MR0 [Address 0370
Serial Sound Interface enable bit
b0
DMA0 control register
1
0
DM0CON [Address 002C
DMA request bit
DMA enable bit
page 319 of 354
]
16
b0
DMA0 source pointer
E6
SAR0 [Address 0022
16
Stores the endpoint 1 OUT FIFO (Address 02E6
Nothing is assigned. Write "0" when writing to these bits.
b0
DMA0 destination pointer
74
16
DAR0 [Address 0026
Stores the SS interface 1 transmit register (Address 0374
Nothing is assigned. Write "0" when writing to these bits.
, 0028
16
16
]
16
1 : Enabled
]
16
0 : DMA not requested
1 : Enabled
Continued to the next page
3. USB Applications
to 0020
]
16
16
to 0024
]
16
16
]
)
16
)
16
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