Renesas M16C Series User Manual page 182

16-bit single-chip microcomputer
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M30245 Group
USB Endpoint 0 Control and Status register
(b15)
b7
0 0
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Figure 2.8.32. USB endpoint 0 control and status register
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
(b8)
b0
b7
b0
Bit Symbol
EP0CSR0
EP0CSR1
EP0CSR2
EP0CSR3
EP0CSR4
EP0CSR5
EP0CSR6
EP0CSR7
EP0CSR8
EP0CSR9
EP0CSR10
EP0CSR11
EP0CSR12
EP0CSR13
Reserved
Note: Always read a
page 173 of 354
Address
Symbol
0298
EP0CS
16
Bit Name
0 : No setup packet or data set ready for unload
1 : Setup packet or data set ready for unload
OUT_BUF_RDY flag
0 : No data set ready for transmit
IN_BUF_RDY flag
1 : Data set ready for transmi
0 : No setup packet ready for unload
SETUP flag
1 : Data set ready for transmit
0 : DATA_END not set by CPU or DATA-END is set by CPU
DATA_END flag
then status phase starts
1 : DATA-END set by CPU
0 : No protocol violation detected
FORCE_STALL flag
1 : Protocol violation detected
0 : No premature completion of control transfer
SETUP_END flag
1 : Premature completion of control transfer
0 : No action
CLR_OUT_BUF_RDY
1 : Data set unloaded from the OUT buffer
0 : No action
SET_IN_BUF_RDY
1 : Data set loaded in IN buffer (sets IN_BUF_RDY flag)
0 : No action
CLR_SETUP
1 : Clears SETUP flag
0 : No action
SET_DATA_END
1 : Last data pcket transferred to/from buffer
0 : No action
CLR_FORCE_STALL
1 : Clears FORCE_STALL flag
0 : No action
CLR_SETUP_END
1 : Clears SETUP_END flag
0 : No EP0 STALL by CPU
SEND_STALL
1 : EP0 STALL by CPU
0 : Clearing DATA_END event causing EP0 interrupt is
DATA_END_MASK
unmasked
1 : Clearing DATA_END event causing EP0 interrupt is
masked
Must always be "0"
"0".
2. USB function
When reset
2000
16
Function
R W
O X
O X
t
O X
O X
O X
O X
O O
Note
O O
Note
O O
Note
O O
Note
O O
Note
O O
Note
O O
O O
O O

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