Clock-Asynchronous Serial I/O (Uart); Overview - Renesas M16C Series User Manual

M30245 Group

2.4 Clock-Asynchronous Serial I/O (UART)

2.4.1 Overview

UART handles communications by means of character-by-character synchronization. The transmission
side and the reception side are independent of each other, so full-duplex communication is possible. The
following is an overview of the clock-asynchronous serial I/O.
(1) Transmission/reception format
Figure 2.4.1 shows the transmission/reception format, and Table 2.4.1 shows the names and func-
tions of transmission data.
www.DataSheet4U.com
Figure 2.4.1. Transmission/reception format
Table 2.4.1. Transmission data names and functions
Name
ST (start bit)
DATA (character bits)
PAR (parity bit)
SP (stop bit)
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Transfer data length : 7 bits
Transfer data length : 8 bits
Transfer data length : 9 bits
A 1-bit "L" signal to be added immediately before character bits.
This bit signals the start of data transmission.
Transmission data set in the UARTi transmit buffer register.
A signal to be added immediately after character bits so as to increase data
reliability. The level of this signal so varies that the total number of 1's in
character bits and this bit always becomes even or odd depending on which
parity is chosen, even or odd.
Either 1-bit or 2-bit "H" signal to be added immediately after character bits (after
the parity bit if parity is checked). This / they signals the end of data
transmission.
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1ST – 7DATA 1SP
1ST – 7DATA 2SP
1ST – 7DATA – 1PAR – 1SP
1ST – 7DATA – 1PAR – 2SP
1ST – 8DATA 1SP
1ST – 8DATA 2SP
1ST – 8DATA – 1PAR – 1SP
1ST – 8DATA – 1PAR – 2SP
1ST – 9DATA 1SP
1ST – 9DATA 2SP
1ST – 9DATA – 1PAR – 1SP
1ST – 9DATA – 1PAR – 2SP
ST : Start bit
DATA : Character bit (Transfer data)
PAR : Parity bit
SP : Stop bit
Function
2. UART