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Enable DMA0
b7
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Clear CRC data register
b15
Setting CRC mode register
b7
1
Setting CRC snoop address register
b15
1
0
Set Software DMA request bit to "1" in the status that DMA enable bit is "1"
b7
1
Figure 3.6.3. Setting routine (2) of DMA transfer from RAM to UART using SFR snooping function
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Continued from the previous page
b0
DMA0 control register
1
0
DM0CON [Address 002C
DMA request bit
0 : DMA not requested
DMA enable bit
1 : Enabled
b8 b7
00
00
16
16
b0
CRC mode register
0
CRCMR [Address 03B6
CRC mode polynomial selection bit
0 : CRC-CCITT
CRC mode selection bit 0
1 : MSB first mode
b8 b7
036A
16
b0
DMA0 cause select register
DM0SL [Address 03B8
Software DMA request bit
1 : Occurred
1st byte DMA transfer
Continued to the next page
page 314 of 354
]
16
b0
CRC data register
CRCD [Address 03BD
]
16
b0
CRC snoop address register
CRCSRA [Address 03B5
SFR snoop address bit
Set address: 036A
(UART1 transmit buffer register)
16
CRCSAR Read
0 : Disabled
CRCSAR Write
1 : Enabled
]
16
Transfer to CRC input register at the same
time by SFR snoop function
3. CRC Snoop Function Applications
, 03BC
]
16
16
, 03B4
]
16
16
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