Renesas M16C Series User Manual page 263

M30245 Group
(5) Watchdog timer cycle
The watchdog timer cycle varies depending on the BCLK and the frequency division ratio of the
prescaler selected.
Table 2.12.1 shows the watchdog timer cycle.
www.DataSheet4U.com
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Table 2.12.1. The watchdog timer cycle (f(X
CM07 CM06 CM17
0 0 0
0 0 0
0 0 1
0 0 1
0 1 Invalid
1 Invalid Invalid
Note: An error due to the prescaler occurs.
page 254 of 354
) = 16MH
IN
CM16
BCLK
0 16MHz
1 8MHz
0 4MHz
1 1MHz
Invalid 2MHz
Invalid 32kHz
2. Watchdog Timer
)
Z
WDC7 Period
0 Approx. 32.8ms (Note)
1 Approx. 262.1ms (Note)
0 Approx. 65.5ms (Note)
1 Approx. 524.3ms (Note)
0 Approx. 131.1ms (Note)
1 Approx. 1.049s (Note)
0 Approx. 524.3ms (Note)
1 Approx. 4.194s (Note)
0 Approx. 262.1ms (Note)
1 Approx. 2.097s (Note)
Invalid Approx. 2s (Note)