Renesas M16C Series User Manual page 74

M30245 Group
Example of wiring
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Example of operation
Transfer clock
Transmit
enable bit (TE)
Transmit buffer
empty flag (Tl)
CTSi
TxDi
Transmit
register empty
flag (TXEPT)
Transmit
interrupt request
bit (IR)
Shown in ( ) are bit symbols.
The above timing applies to the following settings :
Figure 2.4.7. Operation timing of transmission in UART mode
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Microcomputer
Note: Since T
this pin needs pull-up resistance.
When confirming stop bit, stopped transfer clock once because CTS = "H"
Tc
Started transfer clock again to start transmitting immediately after confirming CTS = "L"
(1) Transmission enabled
(2) Confirme CTS
(3) Start transmission
"1"
"0"
Data is set in UARTi transmit buffer register
"1"
"0"
"H"
"L"
Start
bit
ST D D D D
0 1 2
"1"
"0"
"1"
"0"
• Parity is enabled.
• One stop bit.
• CTS function is selected.
• Transmit interrupt cause select bit = "1".
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(Note)
T Di
X
CTSi
D pin is N-channel open drain,
X 2
(4) Confirme stop bit
(5) Start transmission
Transferred from UARTi transmit buffer register to UARTi transmit register
Stopped pulsing because transfer enable bit = "0"
Stop
Parity
bit bit
D D D D P SP ST D
3 4 5 6 7 0
Cleared to "0" when interrupt request is accepted, or cleared by software
Tc = 16 (n + 1) / fi or 16 (n + 1) / f
fi : frequency of BRGi count source (f
f : frequency of BRGi count source (external clock)
EXT
n : value set to BRGi
Receiver side IC
R D
X
Port
D D D D D D D P SP
1 2 3 4 5 6 7
EXT
, f , f
1 8 32
2. UART
ST D D
0 1
)