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2.12 Watchdog Timer
2.12.1 Overview
The watchdog timer can detect a runaway program using its 15-bit timer prescaler. The following is an
overview of the watchdog timer.
(1) Watchdog timer start procedure
When reset, the watchdog timer is in stopped state. Writing to the watchdog timer start register
initializes the watchdog timer to 7FFF
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timer, once started operating, cannot be stopped by any means other than stopping conditions.
(2) Watchdog timer stop conditions
The watchdog timer stops in any one of the following states:
(a) Period in which the CPU is in stopped state
(b) Period in which the CPU is in waiting state
(c) Period in which the microcomputer is in hold state
(3) Watchdog timer initialization
The watchdog timer is initialized to 7FFF
(a) When the watchdog timer writes to the watchdog timer start register while a count is in progress
(b) When the watchdog timer underflows
(4) Runaway detection
When the watchdog timer underflows, either a watchdog timer interrupt occurs or reset is selected
depending on the setting of the watchdog timer function select bit. In writing a program, write to the
watchdog timer start register before the watchdog timer underflows.
The watchdog timer interrupt occurs regardless of the status of the interrupt enable flag (I flag). In
processing a watchdog timer interrupt, set the software reset bit to "1" to reset software.
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
and causes it to start performing a down count. The watchdog
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in the cases given below, and begins a down count.
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2. Watchdog Timer
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