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Figure 3.6.4. Setting routine (3) of DMA transfer from RAM to UART using SFR snooping function
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Continued from the previous page
The DMA transfer request from the 2nd byte on is occurred
when DMA enable bit = "1" and the UART1 is transmit request state.
DMA0 transfer from the 2nd byte on
Completion of the DMA0 transfer and occurrence of the DMA0 interrupt request.
Transfer of the 16-bit calculation result which is stored in CRC data register
to UART1 transmit buffer register every 1 byte.
To subsequently start the DMA0 transfer:
Disable the DMA0 once and set the DMA0 related registers once again.
page 315 of 354
3. CRC Snoop Function Applications
Transfer of the data to
CRC input register by
the SFR snoop function.
DMA enable bit is set to "0"
by underflow of the DMA0 transfer counter.
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