Renesas M16C Series User Manual page 53

M30245 Group
U A R T i t r a n s m i t / r e c e i v e c o n t r o l r e g i s t e r 0 ( i = 0 t o 3 )
b7 b6 b5 b 4 b 3 b 2 b 1 b 0
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UARTi transmit/receive control register 1 (i= 0 to 3)
b7 b6 b5
Figure 2.3.4. Serial I/O-related registers (3)
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
S y m b o l
U i C 0 ( i = 0 t o 3 )
B i t
B i t n a m e
s y m b o l
C L K 0 B R G c o u n t s o u r c e
s e l e c t b i t
C L K 1
C R S C T S / R T S f u n c t i o n
s e l e c t b i t
T X E P T T r a n s m i t r e g i s t e r e m p t y
f l a g
C R D C T S / R T S d i s a b l e b i t
N C H
D a t a o u t p u t s e l e c t b i t
( N o t e 2 )
CKPOL CLK polarity select bit
UFORM T r a n s f e r f o r m a t s e l e c t b i t
( N o t e 3 )
Note 1: Set the corresponding port direction register to "0".
Note 2: UART2 transfer pin (TxD
It cannot be set to CMOS output.
Note 3: Only clock synchronous serial I/O mode and 8-bit UART mode are valid.
Note 4: The corresponding port register and port direction register are invalid.
b4 b3 b2 b1 b0
Symbol
UiC1 (i=0 to 3)
Bit Symbol Bit Name
Transmit enable
TE
bit
Transmit buffer
TI
empty flag
Receive enable
RE
bit
Receive
RI
complete flag
UARTi transmit
UiIRS
interrupt cause
select bit
UARTi continuous
UiRRM receive mode
enable bit
Data logic
UiLCH
select bit
Error signal
UiERE
output enable bit
Note 1: When disabling the error signal output, set the UiERE bit to "0" after setting the
UiMR register.
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A d d r e s s
0 3 A C , 0 3 6 C , 0 3 3 C , 0 3 2 C
1 6 1 6 1 6
F u n c t i o n
( D u r i n g c l o c k s y n c h r o n o u s
s e r i a l I / O m o d e )
b1 b0
0 0 : f is selected
1
0 1 : f is selected
8
1 0 : f is selected
32
1 1 : Inhibited
Valid when bit 4 = "0"
0 : CTS function is selected (Note 1)
1 : RTS function is selected (Note 4)
0 : Data present in transmit register
(during transmission)
1 : No data present in transmit
register (transmission completed)
0 : CTS/RTS function enabled
1 : CTS/RTS function disabled
0 : TxDi/SDAi and SCLi pin is CMOS
output
1 : TxDi/SDAi and SCLi pin is
N-channel open drain output
0 : Transmit data is output at
falling edge of transfer clock
and receive data is input at
rising edge
1 : Transmit data is output at
rising edge of transfer clock
and receive data is input at
falling edge
0 : LSB first
1 : MSB first
: P7 and SCL2: P7 ) is N-channel open drain output.
2 0 1
Address
03AD , 036D , 033D , 032D
16 16 16 16
Function
Function
(clock synchronous
(UART mode)
serial I/O mode)
0 : Transmit disabled
1 : Transmit enabled
0 : Data present in transmit buffer register
1 : No data present in transmit buffer register
0 : Receive disabled
1 : Receive enabled
0 : Data packet in receive buffer register
1 : No data packet in receive buffer register
0 : Transmit buffer empty (TI =1)
1 : Transmit buffer completed ( TXEPT =1)
0 : Continuous receive
mode disabled
Set to "0"
1 : Continuous receive
mode enabled
0 : No reverse
1 : Reverse
Set to "0" 0 : Output disabled
The value is 1 : Output enabled
indeterminate when read.
2. Clock-Synchronous Serial I/O
W h e n r e s e t
, 0 8
1 6 1 6
F u n c t i o n
( D u r i n g U A R T m o d e )
b1 b0
0 0 : f 0 0 : f 0 0 : f 0 0 : f is selected is selected is selected is selected
1 1 1 1
0 1 : f 0 1 : f 0 1 : f 0 1 : f is selected is selected is selected is selected
8 8 8 8
1 0 : f 1 0 : f 1 0 : f 1 0 : f is selected is selected is selected is selected
32 32 32 32
1 1 : Inhibited 1 1 : Inhibited 1 1 : Inhibited 1 1 : Inhibited
Valid when bit 4 = "0"
0 : CTS function is selected (Note 1)
1 : RTS function is selected (Note 4)
0 : Data present in transmit register
(during transmission)
1 : No data present in transmit
register (transmission completed)
0 : CTS/RTS function enabled
1 : CTS/RTS function disabled
0 : T x D i / S D A i a n d S C L i p i n i s C M O S
o u t p u t
1 : T x D i / S D A i a n d S C L i p i n i s
N - c h a n n e l o p e n d r a i n o u t p u t
Set to "0"
0 : LSB first
1 : MSB first
When reset
02
16
R W
(Note 1)
R W