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S e l e c t i n g S a m p l e a n d h o l d
b 7
0
0
S e t t i n g A D c o n t r o l r e g i s t e r 0 a n d A D c o n t r o l r e g i s t e r 1
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b 7
0
0
Note 1 : Rewrite to analog input pin select bit after changing A/D operation mode.
Note 2 : When f(X
Setting A/D conversion start flag
b7
1
Reading conversion result
(b15)
b7
Figure 2.9.5. Set-up procedure of one-shot mode
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
b 0
AD control register 2 [Address 03D4
0
1
ADCON2
A / D c o n v e r s i o n m e t h o d s e l e c t b i t
1 : W i t h s a m p l e a n d h o l d
M u s t a l w a y s b e s e t t o " 0 "
b 0
A D c o n t r o l r e g i s t e r 0 [ A d d r e s s 0 3 D 6
0
0
A D C O N 0
A n a l o g i n p u t p i n s e l e c t b i t ( N o t e 1 )
b 2 b 1 b 0
0 0 0 : A N
i s s e l e c t e d
0
0 0 1 : A N
i s s e l e c t e d
1
0 1 0 : A N
i s s e l e c t e d
2
0 1 1 : A N
i s s e l e c t e d
3
1 0 0 : A N
i s s e l e c t e d
4
1 0 1 : A N
i s s e l e c t e d
5
1 1 0 : A N
i s s e l e c t e d
6
1 1 1 : A N
i s s e l e c t e d
7
One-shot mode is selected (Note 1)
Trigger select bit
0 : Software trigger
A / D c o n v e r s i o n s t a r t f l a g
0 : A / D c o n v e r s i o n d i s a b l e d
Frequency select bit 0 (Note 2)
0 : f
/3 or f
/4 is selected
AD
AD
1 : f
or f
/2 is selected
AD
AD
) is over 10 MHz, the f
frequency must be under 10 MHz by dividing and set ø
IN
AD
b0
AD control register 0 [Address 03D6
ADCON0
A/D conversion start flag
1 : A/D conversion started
(b8)
b0
b7
page 219 of 354
]
16
b 7
]
1 6
0
0
1
0
]
16
S t a r t A / D c o n v e r s i o n
S t o p A / D c o n v e r s i o n
AD register 0
[Address 03C1
16
AD register 1
[Address 03C3
16
AD register 2
[Address 03C5
16
b0
AD register 3
[Address 03C7
16
AD register 4
[Address 03C9
16
AD register 5
[Address 03CB
16
AD register 6
[Address 03CD
16
AD register 7
[Address 03CF
16
E i g h t l o w - o r d e r b i t s o f A / D c o n v e r s i o n r e s u l t
During 10-bit mode
Two high-order bits of A/D conversion result
During 8-bit mode
When read, the content is indeterminate
2. A/D Converter
b 0
A D c o n t r o l r e g i s t e r 1 [ A d d r e s s 0 3 D 7
A D C O N 1
I n v a l i d i n o n e - s h o t m o d e
A / D o p e r a t i o n m o d e s e l e c t b i t 1 ( N o t e 1 )
0 ( M u s t a l w a y s b e " 0 " i n o n e - s h o t m o d e )
8/10-bit mode select bit
0 : 8-bit mode
1 : 10-bit mode
F r e q u e n c y s e l e c t b i t 1 ( N o t e 2 )
0 : f
/ 2 o r f
/ 4 i s s e l e c t e d
A D
A D
1 : f
o r f
/ 3 i s s e l e c t e d
A D
A D
V r e f c o n n e c t b i t
1 : V r e f c o n n e c t e d
Reserved bit
frequency to 10 MHz or lower.
AD
, 03C0
] AD0
16
, 03C2
] AD1
16
, 03C4
] AD2
16
, 03C6
] AD3
16
, 03C8
] AD4
16
, 03CA
] AD5
16
, 03CC
] AD6
16
, 03CE
] AD7
16
]
1 6
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