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Figure 2.4.8. Set-up procedure of transmission in UART mode (1)
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Setting UARTi transmit/receive mode register (i=0 to 3)
b7
b0
UARTi transmit/receive mode register
0 1 0 0 0 1 0 1
UiMR [Address 03A8
Serial I/O mode select bit
b2 b1 b0
1 0 1 : Transfer data 8 bits long
Internal/external clock select bit
0 : Internal clock
Stop bit length select bit
0 : One stop bit
Odd/even parity select bit(Valid when bit 6 = "1")
0 : Odd parity
Parity enable bit
1 : Parity enabled
T
D, R
D I/O polarity reverse bit
X
X
Usually set to "0"
Setting UARTi transmit/receive control register 0 (i=0 to 3)
UARTi transmit/receive control register 0
b7
b0
UiC0 [Address 03AC
0
0
0 0
BRG count source select bit
b1 b0
0 0 : f
is selected
1
0 1 : f
is selected
8
1 0 : f
is selected
32
1 1 : Inhibited
CTS/RTS function select bit
(Valid when bit 4 = "0")
0 : CTS function is selected (Note 1)
Transmit register empty flag
0 : Data present in transmit register
(during transmission)
1 : No data present in transmit register
(transmission completed)
CTS/RTS disable bit
0 : CTS/RTS function enabled
Data output select bit (Note 2)
0 : TxDi/SDAi and SCLi pin is CMOS output
1 : TxDi/SDAi and SCLi pin is N-channel open drain output
Must be fixed to "0" in UART mode
Transfer format select bit
0 : LSB first
Note 1: Set the corresponding port direction register to "0".
Note 2: UART2 transfer pin (TxD2: P7
It cannot be set to CMOS output.
Setting UART transmit/receive control register 1 (i=0 to 3)
b7
b0
UARTi transmit/receive control register 1
0 0 0
UiC1 [Address 03AD
Must be fixed to "0" in UART mode
Data logic select bit
0 : No reverse
Error signal output enable bit (in UART mode)
0 : Output disabled
Continued to the next page
page 66 of 354
, 368
, 0338
, 328
]
16
16
16
16
, 36C
, 033C
, 32C
]
16
16
16
16
and SCL2: P7
) is N-channel open drain output.
0
1
, 36D
, 033D
, 32D
]
16
16
16
16
2. UART
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