Renesas M16C Series User Manual page 102

M30245 Group
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Interrupt request cause select register
Figure 2.5.7. Serial interface special function-related registers (6)
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
UARTi special mode register 4 (i= 0 to 3)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
UiSMR4 (i=0 to 3) 03A4
Bit Symbol
STAREQ
RSTAREQ
STPREQ
STSPSEL
ACKD
ACKC
SCLHI
SWC9
Note 1: These bits automatically become "0" when a start condition is generated.
Note 2: This bit is unavailable when SCLi is external clock.
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
IFSR
Bit Symbol
IFSR0
IFSR1
IFSR2
Nothing is assigned.
Write "0" when writing to this bit. The value is indeterminate when read.
IFSR6
IFSR7
page 93 of 354
Address
, 0364 , 0334 , 0324
16 16 16
Bit Name
Start condition 0 : Clear
generate bit (Note 1) 1 : Start
0 : Clear
Restart condition
1 : Start
generate bit (Note 1)
0 : Clear
Stop condition
1 : Start
generate bit (Note 1)
SCL, SDA output
0 : Ordinal block
select bit
1 : Start/stop condition generate block
0 : ACK
ACK data bit
1 : NACK
0 : SI/O data output
ACK data output
1 : ACKD output
enable bit
0 : Disabled
SCL output stop
1 : Enabled
enable bit
0 : SCL "L" hold disabled
SCL wait output bit 3
1 : SCL "L" hold enabled (Note 2)
Address When reset
035F , 00
16
Bit name
INT0 interrupt polarity 0 : One edge
swiching bit 1 : Two edges
INT1 interrupt polarity 0 : One edge
swiching bit 1 : Two edges
INT2 interrupt polarity 0 : One edge
swiching bit 1 : Two edges
0 : UART0 Bus collision /
Bus collision interrupt
Start/stop condition detection /
request cause select bit 0
Trouble error detection
1 : UART2 Bus collision /
Start/stop condition detection /
Trouble error detection
Bus collision interrupt 0 : UART1 Bus collision /
request cause select bit 1 Start/stop condition detection /
Trouble error detection
1 : UART3 Bus collision /
Start/stop condition detection /
Trouble error detection
2. Serial Interface Special Function
When reset
00
16 16
Function
R W
16
Function
R W