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Reception enabled
b7
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b7
Checking completion of data reception
b7
Checking error
(b15)
b7
Figure 2.3.10. Set-up procedure of reception in clock-synchronous serial I/O mode (2)
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Continued from the previous page
b0
UARTi transmit/receive control register 1
UiC1 [Address 03AD
1
1
Transmit enable bit
1 : Transmission enabled
Receive enable bit
1 : Reception enabled (Note)
Writing dummy data (Note)
b0 b7
b0
Note: Use MOV instruction to write to this register.
b0
UARTi transmit/receive control register 1
UiC1 [Address 03AD
Receive complete flag
0 : No data present in receive buffer register
1 : Data present in receive buffer register
(b8)
b0 b7
b0
Processing after reading out received data
page 52 of 354
, 36D
, 033D
, 32D
16
16
16
16
UART0 transmit buffer register [Address 03AB
UART1 transmit buffer register [Address 036B
UART2 transmit buffer register [Address 033B
UART3 transmit buffer register [Address 032B
Setting dummy data
Start reception
, 36D
, 033D
, 32D
16
16
16
UART0 receive buffer register [Address 03AF
UART1 receive buffer register [Address 036F
UART2 receive buffer register [Address 033F
UART3 receive buffer register [Address 032F
Overrun error flag
0 : No overrun error
1 : Overrun error found
2. Clock-Synchronous Serial I/O
]
, 03AA
16
16
, 036A
] U1TB
16
16
, 033A
] U2TB
16
16
, 032A
] U3TB
16
16
]
16
, 03AE
] U0RB
16
16
, 036E
] U1RB
16
16
, 033E
] U2RB
16
16
, 032E
] U3RB
16
16
] U0TB
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