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P0
output
0
P0
output
1
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P0
output
2
P0
output
3
P10
0
Key input
Key input
interrupt processing
CPU clock
Figure 3.8.1. Operation timing of controlling power using stop mode
Figure 3.8.2. Example of circuit of controling power using stop mode
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
(1) Shift to stop mode
to P10
input
3
Key OFF
Stop mode
page 322 of 354
(2) Cancel a stop mode
(3) Key scan
(4) Shift to stop mode
Key ON
Key OFF
Stop mode
P0
0
P0
1
P0
2
P0
3
P10
/ KI
0
0
P10
/ KI
1
1
P10
/ KI
2
2
P10
/ KI
3
3
3. Controlling Power Applications
Key matrix scan
Key ON
V
REF
I/O port
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