Renesas M16C Series User Manual page 131

M30245 Group
Frequency Synthesizer Control register
b7 b6 b5
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Frequency Synthesizer Clock Control register
b7 b6 b5
0 0 0
Figure 2.7.3. Frequency synthesizer registers (1)
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
b4 b3 b2 b1 b0
Symbol
0 0
FSC
Bit Symbol
FSE
VCO0
VC01
Reserved bit
CHG0
CHG1
LS
Note 1: Recommended.
Note 2: Bits 6 and 5 are set to (bit 6,bit 5)=(1,1) at reset. When using the frequency synthesizer,
we recommend to set to (bit 6,bit 5)=(1,0).
b4 b3 b2 b1 b0
Symbol
0 0
0
FSCCR
Bit Symbol
FSCCR0
Reserved
FCCR4
Reserved
page 122 of 354
Address
03DC
16
Bit Name
Frequency synthesizer enable bit
VCO gain control bit
LPF current control bit (Note 2)
Frequency synthesizer lock status bit
Address
03DB
16
Bit Name
Clock source selection
Divide-by-3 option
2. Frequency synthesizer (PLL)
When reset
01100000
2
Function R W
0 : Disabled
O
1 : Enabled
b2 b1
0 0 : Lowest gain
O
0 1 : Low gain
1 0 : High gain (Note 1)
O
1 1 : Highest gain
Must always be set to "0"
O
b6 b5
0 0 : Disabled
O
0 1 : Low current
1 0 : Medium current (Note 1)
O
1 1 : High current
0 : Unlocked
O
1 : Locked
When reset
00000000
2
Function R W
0 : Xin
O
1 : f
SYN
O
Must always be set to "0"
O
0 : Normal
1 : Divide-by-3
O
Must always be set to "0"
O
O
O
O
O
O
O
O
O
O
O