Renesas M16C Series User Manual page 225

16-bit single-chip microcomputer
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AD control register 0 (Note 1)
b7
b6
b5 b4
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AD control register 1 (Note 1)
b7
b6
0 0
Figure 2.9.2. AD converter-related registers (1)
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
b3 b2
b1
b0
Symbol
ADCON0
Bit Symbol
CH0
CH1
CH2
MD0
MD1
TRG
ADST
CKS0
Note 1: If the AD control regsiter 0 is rewritten during A/D conversion, the conversion result is indeterminate.
Note 2: When changing A/D operation mode, reset the analog input pin.
Note 3: This bit is disabled in single-sweep mode, repeat-sweep mode 0 and repeat-sweep mode 1.
Note 4: Set to "1" when AD
Note 5: When f(X
b5 b4
b3 b2
b1
b0
Symbol
ADCON1
Bit Symbol
SCAN0
SCAN1
MD2
BITS
CKS1
VCUT
Reserved
Note 1: If the AD control regsiter 1 is rewritten during A/D conversion, the conversion result is indeterminate.
Note 2: This bit is invalid in one-shot mode and repeat mode. Channels shown in parentheses are valid
when repeat-sweep mode 1 (bit 2 = "1") is selected.
Note 3: When f(X
page 216 of 354
Address
03D6
16
Bit Name
b2 b1 b0
0 0 0 : AN0
0 0 1 : AN1
0 1 0 : AN2
Analog input pin select bit
0 1 1 : AN3
1 0 0 : AN4
1 0 1 : AN5
1 1 0 : AN6
1 1 1 : AN7
b4 b3
0 0 : One-shot mode
0 1 : Repeat mode
A/D operation mode
1 0 : Single sweep mode
select bit 0
1 1 : Repeat sweep mode 0
Trigger select bit
0 : Software trigger
1 : AD
A/D conversion start flag
0 : A/D conversion disabled
1 : A/D conversion enabled
Frequency select bit 0
0 : f
(Note 5)
1 : f
is selected.
TRG
) exceeds 10 MHz, the φ AD frequency must be less than 10 MHz by dividing.
IN
Address
03D7
16
Bit Name
b1 b0
0 0 : AN0, AN1 (AN0)
A/D sweep pin select bit
0 1 : AN0 to AN3 (AN0, AN1)
1 0 : AN0 to AN5 (AN0 to AN2)
1 1 : AN0 to AN7 (AN0 to AN3)
0 : Any mode other than repeat-sweep mode 1
A/D operation mode select bit 1
1 : Repeat-sweep mode 1
0 : 8-bit mode
8/10-bit mode select bit
1 : 10-bit mode
0 : fAD/2 or fAD/4 is selected
Frequency select bit 1(Note 3)
1 : fAD/1 or fAD/3 is selected
0 : Vref not connected
Vref connect bit
1 : Vref connected
Must always be set to "0"
) exceeds 10 MHz, the φ AD frequency must be less than 10 MHz by dividing.
IN
When reset
00
16
Function
(Note 2, 3)
Repeat sweep mode 1
(Note 2)
trigger
TRG
(Note 4)
/3 or f
/4 is selected
AD
AD
or f
/2 is selected
AD
AD
When reset
00
16
Function
(Note 2)
2. A/D Converter
R W
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
R W
O
O
O
O
O
O
O
O
O
O
O
O

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