Renesas M16C Series User Manual page 351

16-bit single-chip microcomputer
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Figure 4.4.1. Relation between the frequency of BCLK and memory (2)
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
4000
3500
3440
3000
2500
2440
2000
1690
1500
1440
1190
1107
1000
815
773
690
640
565
500
440
440
440
315
240
190
107
65
40
0
1
2
3
4
5
4000
3960
3500
3000
2960
2500
2000
1960
1960
1500
1460
1293
1000
960
960
960
960
760
710
627
560
500
460
460
360
293
210
160
0
1
2
3
4
5
page 342 of 354
OE access time
523
440
378
357
329
297
290
253
218
190
190
154
128
107
90
23
11
3
-4
-10
6
7
8
9
10
11
MHZ
Data set up time
627
531
460
460
404
389
360
335
293
293
260
246
210
182
160
127
103
85
71
60
6
7
8
9
10
11
MHz
4. External Buses
Without wait
1 wait
2 waits
3 waits
258
232
209
190
167
173
159
148
132
119
107
96
76
65
55
47
40
34
-15
-18
-22
-24
-27
-29
12
13
14
15
16
Without wait
1 wait
2 waits
3 waits
324
293
268
246
233
227
210
191
174
160
142
127
114
103
93
51
43
37
31
27
12
13
14
15
16
210
148
85
23

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