Table of Contents
Advertisement
M30245 Group
Example of wiring
www.DataSheet4U.com
Example of operation
Receive enable
bit (RE)
Transmit enable
bit (TE)
Transmit buffer
empty flag (Tl)
RTSi
CLKi
RxDi
Receive complete
flag (Rl)
Receive interrupt
request bit (IR)
Overrun error flag
(OER)
Shown in ( ) are bit symbols.
The above timing applies to the following settings:
• External clock is selected.
• RTS function is selected.
• CLK polarity select bit = "0".
f
EXT
Figure 2.3.8. Operation timing of reception in clock-synchronous serial I/O mode
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Microcomputer
CLKi
R
Di
X
RTSi
"1"
"0"
"1"
"0"
Dummy data is set in UARTi transmit buffer register
"1"
"0"
"H"
"L"
D
D
D
1
0
Transferred from UARTi receive register
"1"
to UARTi receive buffer register
"0"
"1"
"0"
Cleared to "0" when interrupt request is accepted, or cleared by software
"1"
"0"
: frequency of external clock
page 50 of 354
Transferred from UARTi transmit register to UARTi transmit buffer register
Even if the reception is completed, RTS does not change.
1 / f
EXT
RTS becomes "L" when the RI bit changes from "1" to "0".
Reception data is taken in
D
D
D
D
D
D
D
4
5
6
7
1
2
3
0
Read out from UARTi receive buffer register
Make sure that the following conditions are met when
the CLKi pin input ="H" before data reception
• Transmit enable bit → "1"
• Receive enable bit → "1"
• Dummy data write to UARTi transmit buffer register
2. Clock-Synchronous Serial I/O
Transmitter side IC
CLK
T
D
X
Port
D
D
D
D
D
3
4
6
2
5
Advertisement
Table of Contents
